IP Library › Granted Patent US 12,133,425
Granted Patent B2
US 12,133,425 · App. 17/398,742 · Granted Oct 29, 2024

Display device

Inventors: Eung Taek Kim (Hwaseong-si, KR); Kohei Ebisuno (Hwaseong-si, KR); Suk Hoon Ku (Seoul, KR); Jin Suk Lee (Gwangmyeong-si, KR); Jung Mi Choi (Seoul, KR); Young In Hwang (Suwon-si, KR); Tae Sik Kim (Hanam-si, KR); Jin Suk Seo (Cheonan-si, KR); Hwang Sup Shin (Cheonan-si, KR); Taek Geun Lee (Seongnam-si, KR); Joo Hyeon Jo (Cheonan-si, KR); Hong Jun Choi (Seoul, KR); Hee Yeon Kim (Hwaseong-si, KR); Na Lae Lee (Suwon-si, KR)
Assignee: Samsung Display Co., Ltd.
H10K59/124H01L29/792H10K59/123H10K59/131G09G3/3208
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Quick Facts
Patent No.
US 12,133,425
App. No.
17/398,742
Granted
Oct 29, 2024
Kind
B2
Abstract

A display device is provided. The display device includes a first substrate, a first charge trap layer disposed on the first substrate and including silicon nitride, a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor, and an organic light emitting element electrically connected to the first transistor, wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5.

Claims (84)

1. A display device, comprising:

a first substrate;

a first charge trap layer disposed on the first substrate and including silicon nitride;

a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor; and

an organic light emitting element electrically connected to the first transistor,

wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5,

wherein the content of the Si element in the first charge trap layer is in a range of 60 at % to 70 at % and the content of the N element in the first charge trap layer is in a range of 25 at % to 35 at %.

2. The display device of claim 1 ,

wherein the content of the Si element and the content of the N element are analyzed through energy dispersion X-ray spectrometry (EDS).

3. A display device, comprising:

a first substrate;

a first charge trap layer disposed on the first substrate and including silicon nitride;

a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor; and

an organic light emitting element electrically connected to the first transistor,

wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5,

wherein a ratio of Si-H bonds in the first charge trap layer is in a range of 8 at % to 15 at %.

4. The display device of claim 3 ,

wherein a ratio of the Si-H bonds to N-H bonds in the first charge trap layer is in a range of 8 to 15.

5. The display device of claim 4 ,

wherein a ratio of the N-H bonds in the first charge trap layer is in a range of 0.1 at % to 15 at %.

6. The display device of claim 5 ,

wherein the first charge trap layer is formed under an ammonia-free (NH3-free) condition.

7. A display device, comprising:

a first substrate;

a first charge trap layer disposed on the first substrate and including silicon nitride;

a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor;

an organic light emitting element electrically connected to the first transistor,

a second charge trap layer disposed between the first charge trap layer and the semiconductor layer and including silicon oxide, and

wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5,

wherein a ratio of N-H bonds in the second charge trap layer is in a range of 0.7 at % to 1.5 at %.

8. The display device of claim 7 , further comprising:

a second substrate disposed on the first substrate,

wherein the second substrate is disposed between the first substrate and the first charge trap layer.

9. The display device of claim 8 , further comprising:

a lower semiconductor layer disposed between the first substrate and the second substrate.

10. A display device, comprising:

a first substrate;

a first charge trap layer disposed on the first substrate and including silicon nitride;

a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor;

an organic light emitting element electrically connected to the first transistor,

a second substrate disposed on the first substrate, and

wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5,

wherein the first charge trap layer is disposed between the first substrate and the second substrate.

11. A display device, comprising:

a first substrate;

a first charge trap layer disposed on the first substrate and including silicon nitride;

a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor; and

an organic light emitting element electrically connected to the first transistor,

wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5,

wherein the first charge trap layer overlaps the first active layer, and does not overlap the second active layer.

12. The display device of claim 11 ,

wherein the first charge trap layer includes an opening penetrating in a thickness direction, and the opening overlaps at least a channel region of the second transistor.

13. A display device, comprising:

a first substrate;

a first charge trap layer disposed on the first substrate and including silicon nitride;

a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor;

an organic light emitting element electrically connected to the first transistor,

wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5,

wherein the first transistor controls a driving current flowing from a first electrode to a second electrode according to a voltage applied to a gate electrode of the first transistor,

the second transistor is disposed between the gate electrode of the first transistor and the second electrode of the first transistor, and

the organic light emitting element is electrically connected to the second electrode of the first transistor, and emits light according to the driving current.

14. A display device, comprising:

a first substrate;

a first charge trap layer disposed on the first substrate and including silicon nitride;

a second substrate disposed on the first substrate with the first charge trap layer between the first substrate and the second substrate;

a second charge trap layer disposed on the second substrate and including silicon oxide;

a semiconductor layer disposed on the second charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor; and

an organic light emitting element electrically connected to the first transistor,

wherein a ratio of N-H bonds in the second charge trap layer is in a range of 0.7 at % to 1.5 at %.

15. The display device of claim 14 ,

wherein the first charge trap layer overlaps the first active layer, and does not overlap the second active layer.

16. The display device of claim 14 ,

wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5.

17. A display device, comprising:

a first substrate;

a first charge trap layer disposed on the first substrate and including silicon nitride;

a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor; and

an organic light emitting element electrically connected to the first transistor,

wherein a content of a Si element in the first charge trap layer is in a range of 60 at % to 70 at %, and a content of an N element in the first charge trap layer is in a range of 25 at % to 35 at %.

18. The display device of claim 17 , further comprising:

a second charge trap layer disposed on the first charge trap layer and including silicon oxide,

wherein a ratio of N-H bonds in the second charge trap layer is in a range of 0.7 at % to 1.5 at %.

19. The display device of claim 17 ,

wherein the first charge trap layer overlaps the first active layer, and does not overlap the second active layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2021
From: KIM, EUNG TAEK; EBISUNO, KOHEI; KU, SUK HOON; LEE, JIN SUK; CHOI, JUNG MI; HWANG, YOUNG IN; KIM, TAE SIK; SEO, JIN SUK; SHIN, HWANG SUP; LEE, TAEK GEUN; JO, JOO HYEON; CHOI, HONG JUN; KIM, HEE YEON; LEE, NA LAE
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 057138/0948 →
Priority Claims (1)
KR 10-2020-0144420 · Nov 2, 2020 · national
Continuity (1)
Related Publication 20220140033A1 · May 5, 2022