IP Library Granted Patent US 11,923,676
Granted Patent B2
US 11,923,676 · App. 17/400,907 · Granted Mar 5, 2024

Method for identifying element failure in capacitor banks

Inventor: Haijie Wang (Calgary, CA)
H02H7/16H02H3/042H02H3/353
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Quick Facts
Patent No.
US 11,923,676
App. No.
17/400,907
Granted
Mar 5, 2024
Kind
B2
Abstract

A method for identifying element failure in capacitor banks is provided. Capacitor bank phase current is measured and a zero-sequence or negative-sequence current is calculated or measured. A three-phase voltage is measured from a three-phase bus voltage transformer and a zero-sequence voltage or negative-sequence voltage is calculated. A compensated unbalance current is calculated and compared to a predetermined acceptable range. A failure is identified where the compensated unbalance current is outside the predetermined acceptable range.

Claims (46)

1. A method for identifying element failure in capacitor banks, comprising the steps of:

measuring a capacitor bank phase current;

calculating a zero-sequence current using the capacitor bank phase current;

measuring a three-phase voltage from a three-phase bus voltage transformers;

calculating a zero-sequence voltage using the three-phase voltage;

calculate a compensated unbalance current using a predetermined capacitor bank nominal impedance number, the zero-sequence current, and the zero-sequence voltage; and

comparing the compensated unbalance current to a predetermined acceptable range, a capacitor bank element failure being identified where the compensated unbalance current is outside the predetermined acceptable range.

2. The method of claim 1 comprising a further step of applying an analog filter to the capacitor bank phase current.

3. The method of claim 1 comprising a further step of applying a digital filter to the capacitor bank phase current.

4. The method of claim 1 comprising a further step of applying an analog filter to the three-phase voltages.

5. The method of claim 1 comprising a further step of applying a digital filter to the three-phase voltages.

6. The method of claim 1 comprising a further step of setting off an alarm or a trip when the capacitor bank element failure is identified.

7. The method of claim 6 comprising a further step of applying a time delay prior to setting off the alarm or the trip to avoid a false alarm or a false trip.

8. The method of claim 1 wherein the predetermined acceptable range of the compensated unbalance current is precalculated by an electrical engineer.

9. The method of claim 1 wherein the compensated unbalance current is calculated using the equation

I.c.n=I.n −(zero-sequence voltage)/ Z.ph ;

where I.c.n. is the compensated zero-sequence or neutral current, l.n. is the calculated zero-sequence current, and Z.ph is the nominal phase impedance of the capacitor bank.

10. A method for identifying element failure in capacitor banks, comprising the steps of:

measuring a zero-sequence current using a current transformer installed on a conductor between a capacitor bank neutral and a capacitor bank ground;

measuring a three-phase voltage from a three-phase bus voltage transformers;

calculating a zero-sequence voltage using the three-phase voltage;

calculate a compensated unbalance current using a predetermined capacitor bank nominal impedance number, the zero-sequence current, and the zero-sequence voltage; and

comparing the compensated unbalance current to a predetermined acceptable range, a capacitor bank element failure being identified where the compensated unbalance current is outside the predetermined acceptable range.

11. The method of claim 10 comprising a further step of setting off an alarm or a trip when the capacitor bank element failure is identified.

12. The method of claim 11 comprising a further step of applying a time delay prior to setting off the alarm or the trip to avoid a false alarm or a false trip.

13. The method of claim 10 wherein the predetermined acceptable range of the compensated unbalance current is precalculated by an electrical engineer.

14. The method of claim 10 wherein the compensated unbalance current is calculated using the equation

I.c.n=I.n −(zero-sequence voltage)/ Z.ph ;

where I.c.n. is the compensated zero-sequence or neutral current, l.n. is the measured neutral current, and Z.ph is the nominal phase impedance of the capacitor bank.

15. A method for identifying element failure in capacitor banks, comprising the steps of:

measuring a capacitor bank phase current;

calculating a negative-sequence current using the capacitor bank phase current;

measuring a three-phase voltage from a three-phase bus voltage transformer;

calculating a negative-sequence voltage using the three-phase voltage;

calculate a compensated unbalance current using a predetermined capacitor bank nominal impedance number, the negative-sequence current, and the negative-sequence voltage; and

comparing the compensated unbalance current to a predetermined acceptable range, a capacitor bank element failure being identified where the compensated unbalance current is outside the predetermined acceptable range.

16. The method of claim 15 comprising a further step of applying an analog filter to the capacitor bank phase current.

17. The method of claim 15 comprising a further step of applying a digital filter to the capacitor bank phase current.

18. The method of claim 15 comprising a further step of applying an analog filter to the three-phase voltages.

19. The method of claim 15 comprising a further step of applying a digital filter to the three-phase voltages.

20. The method of claim 15 comprising a further step of setting off an alarm or a trip when the capacitor bank element failure is identified.

21. The method of claim 20 comprising a further step of applying a time delay prior to setting off the alarm or the trip to avoid a false alarm or a false trip.

22. The method of claim 15 wherein the predetermined acceptable range of the compensated unbalance current is precalculated by an electrical engineer.

23. The method of claim 15 wherein the compensated unbalance current is calculated using the equation

I.c.n 2=I.n−(zero-sequence voltage)/ Z.ph ;

where I.c.2 is the compensated negative-sequence current and Z.ph is the nominal phase impedance of the capacitor bank.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Aug 7, 2025
From: MHO TECHNOLOGIES CORP.; HV LOGIC LTD.
To: HV LOGIC LTD.
Reel/Frame 071964/0544 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2021
From: WANG, HAIJIE
To: MHO TECHNOLOGIES CORP.
Reel/Frame 057164/0879 →
Continuity (1)
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