IP Library › Granted Patent US 12,224,215
Granted Patent B2
US 12,224,215 · App. 17/403,428 · Granted Feb 11, 2025

Display device and bonding detection method of display device

Inventors: Chienpang Huang (Beijing, CN); Kaifang Zhu (Beijing, CN); Chuntong Jiang (Beijing, CN); Wei Li (Beijing, CN)
Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd.
H01L22/32G01R31/2812
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Quick Facts
Patent No.
US 12,224,215
App. No.
17/403,428
Granted
Feb 11, 2025
Kind
B2
Abstract

A display device and a bonding detection method of the display device are provided. The display device includes: a display panel, a flexible circuit board and a chip on flex with a control chip, where the display panel is connected with the flexible circuit board through the chip on flex in a bonding manner, a first detection line located on the display panel, a second detection line extending to the flexible circuit board from one end of the first detection line through the chip on flex, and a third detection line extending to the flexible circuit board from the other end of the first detection line through the chip on flex, where a path where the second detection line is located is provided with at least two first test pins, and a path where the third detection line is located is provided with at least two second test pins.

Claims (35)

1. A display device, comprising:

a display panel;

a flexible circuit board;

a chip on film with a control chip, wherein the display panel is connected with the flexible circuit board through the chip on film in a bonding manner;

a first detection line located on the display panel;

a second detection line extending to the flexible circuit board from one end of the first detection line through the chip on film; and

a third detection line extending to the flexible circuit board from the other end of the first detection line through the chip on film;

wherein a path where the second detection line is located is provided with at least two first test pins, and a path where the third detection line is located is provided with at least two second test pins;

the second detection line and the third detection line are both closed loops;

wherein each of the closed loops comprises:

two first traces extending in a first direction on the chip on film,

a semi-closed first line frame located on the display panel, and

a semi-closed second line frame located on the flexible circuit board,

wherein the first direction is a direction pointing from the display panel to the flexible circuit board, and the first detection line is connected to the first line frame; and

two ends of the first line frame are correspondingly butted with two ends of the two first traces respectively, and two ends of the second line frame are correspondingly butted with the other two ends of the two first traces respectively.

2. The display device according to claim 1 , wherein the path where the second detection line is located is provided with the two first test pins, and the two first test pins are both located on the chip on film; and

the path where the third detection line is located is provided with the two second test pins, and the two second test pins are both located on the chip on film.

3. The display device according to claim 2 , wherein between the two first test pins of the each closed loop, line resistance across the display panel is different from line resistance across the flexible circuit board.

4. The display device according to claim 3 , wherein between the two first test pins of the each closed loop, a trace length across the display panel is different from a trace length across the flexible circuit board.

5. The display device according to claim 3 , wherein between the two first test pins of the each closed loop, a trace width across the display panel is different from a trace width across the flexible circuit board.

6. The display device according to claim 1 , wherein the second detection line and the third detection line are respectively located on two sides of the control chip; and the first detection line is in a semi-closed shape surrounding an edge of the display panel.

7. The display device according to claim 1 , wherein the display panel is circular or elliptical.

8. A bonding detection method of the display device according to claim 1 , comprising:

providing the display device; and

according to resistance between two first test pins on the path where the second detection line is located, resistance between two second test pins on the path where the third detection line is located, and resistance between any one of the first test pins on the path where the second detection line is located and any one of the second test pins on the path where the third detection line is located, determining a bonding state of the display panel and the chip on film, a bonding state of the chip on film and the flexible circuit board and a state of the display panel.

9. The bonding detection method according to claim 8 , wherein the second detection line and the third detection line are closed loops, the two first test pins are both located on the chip on film, and the two second test pins are both located on the chip on film; and

according to the resistance between the two first test pins on the path where the second detection line is located, the resistance between the two second test pins on the path where the third detection line is located, and the resistance between any one of the first test pins on the path where the second detection line is located and any one of the second test pins on the path where the third detection line is located, the determining the bonding state of the display panel and the chip on film, the bonding state of the chip on film and the flexible circuit board and the state of the display panel, comprises:

when the resistance between the two first test pins is a first resistance value and/or the resistance between the two second test pins is a second resistance value, determining that the display panel and the chip on film are in a poor bonding state, wherein the first resistance value is line resistance across the flexible circuit board between the two first test pins, and the second resistance value is line resistance across the flexible circuit board between the two second test pins;

when the resistance between the two first test pins is a third resistance value and/or the resistance between the two second test pins is a fourth resistance value, determining that the chip on film and the flexible circuit board are in a poor bonding state, wherein the third resistance value is line resistance across the display panel between the two first test pins, and the fourth resistance value is line resistance across the display panel between the two second test pins;

when the resistance between the two first test pins is a fifth resistance value and the resistance between the two second test pins is a sixth resistance value, determining that the display panel and the chip on film are in a bonding state, and the chip on film and the flexible circuit board are in a bonding state, wherein the fifth resistance value is a parallel connection value of the line resistance across the display panel and the line resistance across the flexible circuit board between the two first test pins, and the sixth resistance value is a parallel connection value of the line resistance across the display panel and the line resistance across the flexible circuit board between the two second test pins; and

when a resistance value between any one of the first test pins and any one of the second test pins is infinite, determining that the display panel is in a crack state; when the resistance value between any one of the first test pins and any one of the second test pins is not infinite, determining that the display panel is in a good state.

10. The bonding detection method according to claim 8 , wherein the second detection line and the third detection line are line segments, one of the first test pins on the path where the second detection line is located is located on the chip on film, the other first test pin is located on the flexible circuit board, one of the second test pins on the path where the third detection line is located is located on the chip on film, and the other second test pin is located on the flexible circuit board; and

according to the resistance between the two first test pins on the path where the second detection line is located, the resistance between the two second test pins on the path where the third detection line is located, and the resistance between any one of the first test pins on the path where the second detection line is located and any one of the second test pins on the path where the third detection line is located, the determining the bonding state of the display panel and the chip on film, the bonding state of the chip on film and the flexible circuit board and the state of the display panel, comprises:

when the resistance between the two first test pins on the path where the second detection line is located is infinite, and/or when the resistance between the two second test pins on the third detection line is infinite, determining that the chip on film and the flexible circuit board are in a poor bonding state; when the resistance between the two first test pins on the path where the second detection line is located is not infinite, and/or when the resistance between the two second test pins on the third detection line is not infinite, determining that the chip on film and the flexible circuit board are in a bonding state; and

when a resistance value between any one of the first test pins and any one of the second test pins is infinite, determining that the display panel and the chip on film are in a poor bonding state; when the resistance value between any one of the first test pins and any one of the second test pins is not infinite, determining that the display panel and the chip on film are in a bonding state.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2021
From: HUANG, CHIENPANG; ZHU, KAIFANG; JIANG, CHUNTONG; LI, WEI
To: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 057192/0855 →
Priority Claims (1)
CN 202010955204.6 · Sep 11, 2020 · national
Continuity (1)
Related Publication 20220084894A1 · Mar 17, 2022
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