Ripple suppression in multi-phase buck converters
Methods and systems for ripple suppression in multi-phase buck converters may comprise a buck converter for providing an output voltage with controlled ripple current. The buck converter may include one or more main buck converter stages and one or more suppression buck converter stages coupled with the one or more main buck converter stages. The one or more suppression buck converter stages may provide suppression currents to reduce ripple currents generated in the one or main buck converter stages.
1. A system for power control, the system comprising:
a multiphase buck converter for providing an output DC voltage with controlled ripple current, the buck converter comprising:
one or more main buck converter stages; and
one or more suppression buck converter stages coupled with the one or more main buck converter stages, the one or more suppression buck converter stages being operable to provide a suppression current to reduce ripple currents generated in the one or more main buck converter stages, the suppression current being configured by a particular supply voltage,
wherein each of the one or more main buck converter stages and each of the one or more suppression buck converter stages comprises a stacked transistor pair with an inductor at an output.
2. The system of claim 1 , wherein a drain terminal of one transistor of each transistor pair in the one or more main buck converter stages is biased at a first supply voltage.
3. The system of claim 1 , wherein a drain terminal of one transistor of each transistor pair in the one or more suppression buck converter stages is biased at the particular supply voltage.
4. The system of claim 3 , wherein the first supply voltage is equal to the particular supply voltage.
5. The system of claim 3 , wherein the particular supply voltage is generated by a supply voltage buck converter that is biased by the first supply voltage.
6. The system of claim 3 , wherein the particular voltage is less than the first supply voltage.
7. The system of claim 1 , wherein inductances in the one or more suppression buck stages are different for each stage.
8. The system of claim 1 , wherein inductances in the one or more suppression buck stages are configurable.
9. A method for power control, comprising:
in a buck converter comprising one or more main buck converter stages and one or more suppression buck converter stages coupled with the one or more main buck converter stages:
providing an output voltage with ripple current, wherein the one or more suppression buck converter stages provides suppression currents to cancel ripple currents generated in the one or main buck converters stages; and
generating a second supply voltage using a supply voltage buck converter that is biased by a first supply voltage, the suppression current being configured by the second supply voltage,
wherein each of the one or more main buck converter stages and each of the one or more suppression buck converter stages comprises a stacked transistor pair with an inductor at an output.
10. The method of claim 9 , comprising biasing a drain terminal of one transistor of each transistor pair in the one or more main buck converter stages at the first supply voltage.
11. The method according to claim 9 , comprising biasing a drain terminal of one transistor of each transistor pair in the one or more suppression buck converter stages at the second supply voltage.
12. The method of claim 9 , wherein the second voltage is less than the first supply voltage.
13. The method of claim 9 , wherein the first supply voltage is equal to the second supply voltage.
14. The method of claim 9 , wherein inductances in the one or more harmonic suppression buck stages are different for each stage and/or are configurable.
15. A system, comprising:
a buck converter for providing an output voltage with controlled ripple current, the buck converter comprising:
one or more main buck converter stages;
a suppression digital-to-analog-converter (DAC) coupled with the one or more main buck converter stages, the suppression DAC being operable to provide suppression current to reduce ripple currents generated in the one or main buck converter stages, the suppression current being configured by a particular supply voltage; and
a digital signal processor (DSP) operable to provide a control signal to the suppression DAC,
wherein each of the one or more main buck converter stages comprises a stacked transistor pair with an inductor at an output.
16. The system of claim 15 , further comprising a supply voltage buck converter that is biased by a first supply voltage.
17. The system of claim 15 , wherein a drain terminal of one transistor of each transistor pair in the one or more buck converter stages is biased at the particular supply voltage.