IP Library Granted Patent US 12,067,934
Granted Patent B2
US 12,067,934 · App. 17/411,401 · Granted Aug 20, 2024

Display device and electronic device including display device

Inventors: Shunpei Yamazaki (Setagaya, JP); Jun Koyama (Sagamihara, JP); Hiroyuki Miyake (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G09G3/3208G09G3/2003G09G3/3233H01L27/1225H01L29/78609H01L29/7869H01L29/78693H01L29/78696H10K59/1213H10K59/131G09G2330/021
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,067,934
App. No.
17/411,401
Granted
Aug 20, 2024
Kind
B2
Abstract

Objects are to provide a display device the power consumption of which is reduced, to provide a self-luminous display device the power consumption of which is reduced and which is capable of long-term use in a dark place. A circuit is formed using a thin film transistor in which a highly-purified oxide semiconductor is used and a pixel can keep a certain state (a state in which a video signal has been written). As a result, even in the case of displaying a still image, stable operation is easily performed. In addition, an operation interval of a driver circuit can be extended, which results in a reduction in power consumption of a display device. Moreover, a light-storing material is used in a pixel portion of a self-luminous display device to store light, whereby the display device can be used in a dark place for a long time.

Claims (40)

1. A display device configured to reduce a frequency of writing of image signals to a pixel portion in a period in which a still image is displayed in the pixel portion,

wherein the pixel portion comprises a light-emitting element and a switching transistor in a pixel,

wherein the switching transistor is configured to control an input of the image signals to the pixel,

wherein the switching transistor comprises an oxide semiconductor layer, and

wherein an off-state current of the switching transistor is 1×10 −13 A or less.

2. The display device according to claim 1 , further comprising a driving transistor in the pixel,

wherein the driving transistor is configured to control a current flowing to the light-emitting element in accordance with the image signals.

3. The display device according to claim 1 , wherein the off-state current is a current measured in a range of a gate voltage of −5 V to −20 V when a drain voltage is 1 V and 10 V.

4. The display device according to claim 1 , wherein the oxide semiconductor layer comprises an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, a Sn—Al—Zn—O-based oxide semiconductor, an In—Zn—O-based oxide semiconductor, an In—Sn—O-based oxide semiconductor, an Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, an In—O-based oxide semiconductor, a Sn—O-based oxide semiconductor, or a Zn—O-based oxide semiconductor.

5. The display device according to claim 1 , wherein the image signals written to the pixel portion do not change in a series of frame periods in which the still image is displayed in the pixel portion.

6. A display device configured to reduce a frequency of writing of image signals to a pixel portion in a period in which a still image is displayed in the pixel portion,

wherein the pixel portion comprises a light-emitting element and a switching transistor in a pixel,

wherein the switching transistor is configured to control an input of the image signals to the pixel,

wherein the switching transistor comprises an oxide semiconductor layer, and

wherein an off resistivity of the switching transistor is greater than or equal to 1×10 9 Ω·m.

7. The display device according to claim 6 , further comprising a driving transistor in the pixel,

wherein the driving transistor is configured to control a current flowing to the light-emitting element in accordance with the image signals.

8. The display device according to claim 6 , wherein the oxide semiconductor layer comprises an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, a Sn—Al—Zn—O-based oxide semiconductor, an In—Zn—O-based oxide semiconductor, an In—Sn—O-based oxide semiconductor, an Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, an In—O-based oxide semiconductor, a Sn—O-based oxide semiconductor, or a Zn—O-based oxide semiconductor.

9. The display device according to claim 6 , wherein the image signals written to the pixel portion do not change in a series of frame periods in which the still image is displayed in the pixel portion.

10. A display device configured to reduce a frequency of writing of image signals to a pixel portion in a period in which a still image is displayed in the pixel portion,

wherein the pixel portion comprises a light-emitting element and a switching transistor in a pixel,

wherein the switching transistor is configured to control an input of the image signals to the pixel,

wherein the switching transistor comprises a first gate electrode, an oxide semiconductor layer over the first gate electrode, and a second gate electrode over the oxide semiconductor layer,

wherein a potential of the first gate electrode is the same as a potential of the second gate electrode, and

wherein an off-state current of the switching transistor is 1×10 −13 A or less.

11. The display device according to claim 10 , further comprising a driving transistor in the pixel,

wherein the driving transistor is configured to control a current flowing to the light-emitting element in accordance with the image signals.

12. The display device according to claim 10 , wherein the off-state current is a current measured in a range of a gate voltage of −5 V to −20 V when a drain voltage is 1 V and 10 V.

13. The display device according to claim 10 , wherein the oxide semiconductor layer comprises an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, a Sn—Al—Zn—O-based oxide semiconductor, an In—Zn—O-based oxide semiconductor, an In—Sn—O-based oxide semiconductor, an Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, an In—O-based oxide semiconductor, a Sn—O-based oxide semiconductor, or a Zn—O-based oxide semiconductor.

14. The display device according to claim 10 , wherein the image signals written to the pixel portion do not change in a series of frame periods in which the still image is displayed in the pixel portion.

15. A display device configured to reduce a frequency of writing of image signals to a pixel portion in a period in which a still image is displayed in the pixel portion,

wherein the pixel portion comprises a light-emitting element and a switching transistor in a pixel,

wherein the switching transistor is configured to control an input of the image signals to the pixel,

wherein the switching transistor comprises a first gate electrode, an oxide semiconductor layer over the first gate electrode, and a second gate electrode over the oxide semiconductor layer,

wherein a potential of the first gate electrode is the same as a potential of the second gate electrode, and

wherein an off resistivity of the switching transistor is greater than or equal to 1×10 9 Ω·m.

16. The display device according to claim 15 , further comprising a driving transistor in the pixel,

wherein the driving transistor is configured to control a current flowing to the light-emitting element in accordance with the image signals.

17. The display device according to claim 15 , wherein the oxide semiconductor layer comprises an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, a Sn—Al—Zn—O-based oxide semiconductor, an In—Zn—O-based oxide semiconductor, an In—Sn—O-based oxide semiconductor, an Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, an In—O-based oxide semiconductor, a Sn—O-based oxide semiconductor, or a Zn—O-based oxide semiconductor.

18. The display device according to claim 15 , wherein the image signals written to the pixel portion do not change in a series of frame periods in which the still image is displayed in the pixel portion.

Priority Claims (2)
JP 2009-242757 · Oct 21, 2009 · national
JP 2009-278997 · Dec 8, 2009 · national
Continuity (6)
Continuation 16862658 · Apr 30, 2020
Continuation 16130447 · Sep 13, 2018
Continuation 14881500 · Oct 13, 2015
Continuation 14540326 · Nov 13, 2014
Continuation 12906538 · Oct 18, 2010
Related Publication 20210383750A1 · Dec 9, 2021