IP Library › Granted Patent US 12,051,618
Granted Patent B2
US 12,051,618 · App. 17/430,279 · Granted Jul 30, 2024

Methods for forming semiconductor structures and semiconductor structures

Inventors: Nianwang Yang (Hefei, CN); Yuchen Wang (Hefei, CN)
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
H01L21/7682H01L21/76885
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Quick Facts
Patent No.
US 12,051,618
App. No.
17/430,279
Granted
Jul 30, 2024
Kind
B2
Abstract

The present invention relates to the technical field of semiconductor manufacturing, and in particular, to a method for forming a semiconductor structure and a semiconductor structure. The method for forming a semiconductor structure comprises: forming an interconnect layer and a conductive layer covered on a surface of the interconnect layer; forming a protective layer covering a surface of the conductive layer away from the interconnect layer; forming a trench penetrating the protective layer and the conductive layer; and filling a dielectric layer in the trench, and forming an air gap in the dielectric layer, the air gap extending from the trench in the conductive layer into the trench in the protective layer.

Claims (22)

1. A method for forming a semiconductor structure, comprising:

forming an interconnect layer and a conductive layer covering a surface of the interconnect layer;

forming a protective layer covering a surface of the conductive layer away from the interconnect layer;

forming a trench penetrating the protective layer and the conductive layer by an etching process, wherein chamfering caused by the etching process occurs only in the protective layer; and

filling a dielectric layer in the trench, and forming an air gap in the dielectric layer, the air gap extending from the trench in the conductive layer into the trench in the protective layer.

2. The method for forming a semiconductor structure according to claim 1 , wherein the interconnect layer comprises a plurality of interconnect lines and an isolation layer located between adjacent interconnect lines of the plurality of interconnect lines; and the forming an interconnect layer and a conductive layer covering a surface of the interconnect layer comprises:

forming a first adhesive layer on the surface of the interconnect layer; and

depositing a metal material on a surface of the first adhesive layer away from the interconnect layer, to form the conductive layer.

3. The method for forming a semiconductor structure according to claim 2 , wherein the forming a protective layer covering a surface of the conductive layer away from the interconnect layer comprises:

forming a second adhesive layer on the surface of the conductive layer away from the first adhesive layer; and

depositing a dielectric material on a surface of the second adhesive layer to form the protective layer.

4. The method for forming a semiconductor structure according to claim 3 , wherein the depositing a dielectric material on a surface of the second adhesive layer comprises:

depositing the dielectric material on the surface of the second adhesive layer by a plasma-enhanced chemical vapor deposition process or a high-density plasma chemical vapor deposition process.

5. The method for forming a semiconductor structure according to claim 3 , wherein the forming a trench penetrating the protective layer and the conductive layer comprises:

etching at least the protective layer, the second adhesive layer, the conductive layer and the first adhesive layer, to form the trench penetrating the protective layer, the second adhesive layer, the conductive layer and the first adhesive layer.

6. The method for forming a semiconductor structure according to claim 5 , wherein the forming a trench penetrating the protective layer and the conductive layer comprises:

etching the protective layer, the second adhesive layer, the conductive layer, the first adhesive layer and part of the isolation layer, to form the trench penetrating the protective layer, the second adhesive layer, the conductive layer and the first adhesive layer and extending into the isolation layer.

7. The method for forming a semiconductor structure according to claim 1 , wherein the protective layer is made of one or a combination of two or more of oxide materials, nitride materials and oxynitride materials.

8. The method for forming a semiconductor structure according to claim 1 , wherein the filling a dielectric layer in the trench comprises:

filling the dielectric layer in the trench by a high-density plasma deposition process.

9. The method for forming a semiconductor structure according to claim 1 , wherein a top surface of the air gap is flush with a top surface of the protective layer; or

the top surface of the air gap is below the top surface of the protective layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2021
From: WANG, YUCHEN
To: CHANGXIN MEMORY TECHNOLOGIES, INC.
Reel/Frame 057152/0585 →
EMPLOYMENT AGREEMENT Recorded Aug 11, 2021
From: YANG, NIANWANG
To: CHANGXIN MEMORY TECHNOLOGIES, INC.
Reel/Frame 057493/0066 →
Priority Claims (1)
CN 202010123734.4 · Feb 27, 2020 · national
Continuity (1)
Related Publication 20230116971A1 · Apr 20, 2023