IP Library › Granted Patent US 11,727,861
Granted Patent B2
US 11,727,861 · App. 17/431,182 · Granted Aug 15, 2023

Pixel drive circuit, drive circuit of display panel, and display apparatus

Inventors: Xiurong Wang (Beijing, CN); Wei Hao (Beijing, CN); Lingyun Shi (Beijing, CN); Qibing Gu (Beijing, CN); Guofeng Hu (Beijing, CN); Tao Yang (Beijing, CN); Mengmeng Wang (Beijing, CN); Wenhao Liu (Beijing, CN)
Assignees: BOE MLED Technology Co., Ltd.; BOE Technology Group Co., Ltd.
G09G3/32G09G3/2074G09G2300/0408G09G2300/0426G09G2300/0443G09G2300/0452G09G2300/0804G09G2310/0208G09G2310/0278
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Quick Facts
Patent No.
US 11,727,861
App. No.
17/431,182
Granted
Aug 15, 2023
Kind
B2
Abstract

Provided are a pixel drive circuit, a drive circuit of a display panel, and a display apparatus. The pixel drive circuit includes a switch unit and a drive unit, the switch unit is connected to the drive unit, and the drive unit is configured to be connected to a plurality of sub-pixel units; the switch unit is configured to receive a scan signal and a data signal, be switched on under action of the scan signal, and send the data signal to the drive unit; and the drive unit is configured to send the data signal to the plurality of sub-pixel units connected thereto in a time division manner.

Claims (23)

1. A pixel drive circuit, comprising a switch unit and a drive unit, wherein the switch unit is connected to the drive unit, and the drive unit is configured to be connected to a plurality of sub-pixel units;

the switch unit is configured to receive a scan signal and a data signal, be switched on under action of the scan signal, and send the data signal to the drive unit; and

the drive unit is configured to send the data signal to the plurality of sub-pixel units connected thereto in a time division manner;

wherein six sub-pixel units are provided, the six sub-pixel units comprise a first sub-pixel unit, a second sub-pixel unit, a third sub-pixel unit, a fourth sub-pixel unit, a fifth sub-pixel unit, and a sixth sub-pixel unit; and

the sub-pixel units and the drive unit are arranged in two rows and four columns, the first sub-pixel unit, the second sub-pixel unit, and the sixth sub-pixel unit are located in a first row side by side, and the third sub-pixel unit, the drive unit, the fourth sub-pixel unit, and the fifth sub-pixel unit are located in a second row side by side.

2. The pixel drive circuit according to claim 1 , wherein the switch unit comprises a transistor, a gate of the transistor is configured to receive the scan signal, a first electrode of the transistor is configured to receive the data signal, and a second electrode of the transistor is configured to be connected to the drive unit.

3. The pixel drive circuit according to claim 1 , wherein the drive unit comprises a control sub-unit, a multi-channel selection sub-unit, and a plurality of holding sub-units, wherein:

the control sub-unit is configured to be connected to the switch unit, receive the data signal, and output a corresponding control signal under action of the data signal;

the multi-channel selection sub-unit is configured to be connected to the control sub-unit and the plurality of holding sub-units, and select, under action of the control signal, a corresponding channel to send a corresponding data signal to a corresponding holding sub-unit; and

channels of the multi-channel selection sub-unit are connected to the plurality of holding sub-units in a one-to-one correspondence, and the plurality of holding sub-units are connected to the plurality of sub-pixel units in a one-to-one connection.

4. The pixel drive circuit according to claim 1 , wherein three sub-pixel units are provided, and the three sub-pixel units comprise a first sub-pixel unit, a second sub-pixel unit, and a third sub-pixel unit, which are of different colors; and

the sub-pixel units and the drive unit are arranged in two rows and two columns, the first sub-pixel unit and the second sub-pixel unit are located in a first row side by side, and the third sub-pixel unit and the drive unit in a pixel unit are located in a second row side by side.

5. The pixel drive circuit according to claim 4 , wherein three data signals are sent in a time period of a scan signal.

6. The pixel drive circuit according to claim 1 , wherein six data signals are sent in a time period of a scan signal.

7. A drive circuit of a display panel, comprising pixel units arranged in an array, a plurality of scan lines, and a plurality of data lines, wherein each of the pixel units comprises the pixel drive circuit according to claim 1 ; and

the scan line is located between adjacent row pixel units, and the data line is located between adjacent column pixel units; wherein

when the sub-pixel units and the drive unit are arranged in two rows and two columns, for two adjacent columns of pixel units located in a same row, an arrangement mode of sub-pixel units and a drive unit in a pixel unit in an n-th column and an arrangement mode of sub-pixel units and a drive unit in a pixel unit in an (n+1)-th column mirror each other, and a mirror axis is a straight line located between the pixel unit in the (n+1)-th column and the pixel unit in the n-th column and parallel to a row direction perpendicular to a column direction, wherein n≥1, and

pixel units in each row are configured to be connected to scan lines in two rows, a scan line in one row is configured to provide a scan signal to pixel units in even columns, a scan line in the other row is configured to provide a scan signal to pixel units in odd columns, and a scan line in one row passes through the pixel units.

8. The drive circuit of the display panel according to claim 7 , wherein:

when the sub-pixel units and the drive unit are arranged in two rows and four columns,

for two adjacent columns of pixel units located in a same row, an arrangement mode of sub-pixel units and a drive unit in a pixel unit in an n-th column and an arrangement mode of sub-pixel units and a drive unit in a pixel unit in an (n+1)-th column mirror each other, and a mirror axis is a straight line located between the pixel unit in the (n+1)-th column and the pixel unit in the n-th column and parallel to a row direction perpendicular to a column direction, wherein n≥1.

9. A display apparatus, comprising the drive circuit of the display panel according to claim 8 .

10. A display apparatus, comprising the drive circuit of the display panel according to claim 7 .

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2023
From: HAO, WEI
To: BOE MLED TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 063545/0702 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2022
From: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
To: BOE MLED TECHNOLOGY CO., LTD.
Reel/Frame 059274/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2021
From: WANG, XIURONG; SHI, LINGYUN; GU, QIBING; HU, GUOFENG; YANG, TAO; WANG, MENGMENG; LIU, WENHAO
To: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 057378/0289 →
Priority Claims (1)
CN 202010208335.8 · Mar 23, 2020 · national
Continuity (1)
Related Publication 20220301489A1 · Sep 22, 2022