IP Library Granted Patent US 12,021,160
Granted Patent B2
US 12,021,160 · App. 17/439,307 · Granted Jun 25, 2024

Semiconductor wafer, radiation detection element, radiation detector, and production method for compound semiconductor monocrystalline substrate

Inventors: Koji Murakami (Kitaibaraki, JP); Akira Noda (Kitaibaraki, JP); Ryuichi Hirano (Tokyo, JP)
Assignee: JX METALS CORPORATION
H01L31/02966C30B11/02C30B29/48C30B33/02G01T1/247H01L27/1446
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Quick Facts
Patent No.
US 12,021,160
App. No.
17/439,307
Granted
Jun 25, 2024
Kind
B2
Abstract

Provided is a CdZnTe monocrystalline substrate which has a small leakage current even when a voltage is applied from a low voltage to a high voltage, and which has a lower variation in resistivity with respect to applied voltage changes from 0 to 900 V, and which can maintain a stable resistivity. A semiconductor wafer comprising a cadmium zinc telluride monocrystal having a zinc concentration of 4.0 at % or more and 6.5 at % or less and a chlorine concentration of 0.1 ppm by weight or more and 5.0 ppm by weight or less, wherein when a voltage is applied in a range of from 0 to 900 V, the semiconductor wafer has a resistivity for each applied voltage value of 1.0×10 7 Ωcm or more and 7.0×10 8 Ωcm or less, and wherein a relative variation coefficient of each resistivity to the applied voltages in a range of from 0 to 900 V is 100% or less.

Claims (20)

1. A semiconductor wafer comprising a cadmium zinc telluride monocrystal having a zinc concentration of 4.0 at % or more and 6.5 at % or less and a chlorine concentration of 0.1 ppm by weight or more and 5.0 ppm by weight or less,

wherein when a voltage is applied in a range of from 0 to 900 V, the semiconductor wafer has a resistivity for each applied voltage value of 1.0×10 7 Ωcm or more and 7.0×10 8 Ωcm or less, and

wherein a relative variation coefficient of each resistivity to the applied voltages in a range of from 0 to 900 V is 100% or less.

2. A radiation detection element, comprising:

a substrate cut out from the semiconductor wafer according to claim 1 such that a main surface is rectangular;

a common electrode formed on one main surface of the substrate; and

a plurality of pixel electrodes formed in matrix on the other main surface of the substrate.

3. The radiation detection element according to claim 2 ,

wherein, when a voltage is applied in a range of from 0 to 900 V, a resistivity for each applied voltage value is 1.0×10 7 Ωcm or more and 7.0×10 8 Ωcm or less, and

wherein a relative variation coefficient of each resistivity to the applied voltages in the range of from 0 to 900 V is 100% or less.

4. A radiation detector, comprising:

the radiation detection element according to claim 2 ;

a power source for applying a bias voltage to the radiation detection element, the power source being connected to the radiation detection element; and

an amplification unit for amplifying an electric signal output from the radiation detection element, the amplification unit being connected to the radiation detection element.

5. A method for producing a compound semiconductor monocrystalline substrate, the substrate comprising a cadmium zinc telluride monocrystal having a zinc concentration of 4.0 at % or more and 6.5 at % or less and a chlorine concentration of 0.1 ppm by weight or more and 5.0 ppm by weight or less,

wherein when a voltage is applied in a range of from 0 to 900 V, the substrate has a resistivity for each applied voltage value of 1.0×10 7 Ωcm or more and 7.0×10 8 Ωcm or less,

wherein a relative variation coefficient of each resistivity to the applied voltages in a range of from 0 to 900 V is 100% or less, and

wherein the method comprises:

a crystal growth step of a monocrystal in a furnace; and

after the crystal growth step of the monocrystal is completed, a step of subjecting the monocrystal to a heat treatment for 50 to 90 hours under conditions where a temperature of a monocrystal placing position in the furnace is 385 to 400° C. and a temperature of a Cd reservoir portion is room temperature without opening an ampule in the furnace, and slicing a heated monocrystal ingot into a wafer to form a substrate.

Assignments (2)
CHANGE OF NAME Recorded Feb 9, 2024
From: JX NIPPON MINING & METALS CORPORATION
To: JX METALS CORPORATION
Reel/Frame 066550/0982 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2021
From: MURAKAMI, KOJI; NODA, AKIRA; HIRANO, RYUICHI
To: JX NIPPON MINING & METALS CORPORATION
Reel/Frame 057489/0585 →
Priority Claims (1)
JP 2019-094051 · May 17, 2019 · national
Continuity (1)
Related Publication 20220158007A1 · May 19, 2022