INTERNAL POWER SUPPLY FOR AMPLIFIERS
An internal power supply for an amplifier is disclosed. The internal power supply floats according to a common mode voltage at the input to the amplifier and according to an input voltage at an input stage of the amplifier. Powering the input stage of the amplifier using the floating supply allows for the use of low voltage devices even when the range of possible common mode voltages includes high voltages. The use of low voltage devices can correspond to performance improvement for the amplifier and can help reduce the size of the amplifier. The internal supply can accommodate both positive and negative common mode voltages and can be used for current sense amplifiers of any gain.
1 . A power supply comprising:
a selector circuit configured to receive a common mode voltage (V CM ), an upper external voltage (V DD ), and a lower external voltage (V GND ), the selector circuit configured to:
output a maximum voltage (V MAX ) as the larger of the common mode voltage (V CM ) and the upper external voltage (V DD ); and
output a minimum voltage (V MIN ) as the smaller of the common mode voltage (V CM ) and the lower external voltage (V GND ); and
a floating supply circuit configured to receive V MAX and V MIN from the selector circuit, the floating supply circuit configured to generate a floating voltage range defined by an upper internal voltage (V INTP ) and a lower internal voltage (V INTN ), the floating voltage range is level-shifted according to V MAXX and V MIN .
2 . The power supply according to claim 1 , wherein V CM is in a range that includes positive and negative voltages.
3 . The power supply according to claim 1 , wherein the selector circuit includes:
a first pair of diodes are configured to connect the larger of V CM and V DD to a maximum-voltage output; and
a second pair of diodes configured to connect the smaller of V CM and V GND to a minimum-voltage output. cm 4 . The power supply according to claim 3 , wherein the first pair of diodes and the second pair of diodes are Schottky diodes.
5 . The power supply according to claim 3 , wherein:
the first pair of diodes are cathode-coupled at the maximum-voltage output; and
the second pair of diodes are anode-coupled at the minimum-voltage output.
6 . The power supply according to claim 1 , wherein the selector circuit includes:
a first pair of transistors configured to switch the larger of V CM and V DD to a maximum-voltage output; and
a second pair of transistors configured to switch the smaller of V CM and V GND to a minimum-voltage output.
7 . The power supply according to claim 6 , wherein the first pair of transistors include:
a first PMOS transistor connected between V CM and the maximum-voltage output, the first PMOS transistor switched by V DD ; and
a second PMOS transistor connected between V DD and the maximum-voltage output, the second PMOS transistor switched by V CM .
8 . The power supply according to claim 6 , wherein the second pair of transistors include:
a first NMOS transistor connected between V CM and the minimum-voltage output, the first NMOS transistor switched by V GND ; and
a second NMOS transistor connected between V GND and the minimum-voltage output, the second NMOS transistor switched by V CM .
9 . The power supply according to claim 1 , wherein the floating supply circuit includes a regulation device coupled between a first output of the floating supply circuit and a second output of the floating supply circuit, the first output configured to output V INTP and the second output configured to output V INTN .
10 . The power supply according to claim 9 , wherein the regulation device is Zener diode.
11 . The power supply according to claim 9 , wherein the floating supply circuit includes:
an NMOS transistor configured to couple the first output to V MAX when V CM is greater than V DD ; and
a PMOS transistor configured to couple the second output to V MIN when V CM is less than V GND .
12 . A method for generating a floating voltage range, the method comprising:
receiving a common mode voltage (V CM ), an upper external voltage (V DD ), and a lower external voltage (V GND );
generating a maximum voltage (V MAX ) as the larger of the common mode voltage (V CM ) and the upper external voltage (V DD );
generating a minimum voltage (V MIN ) as the smaller of the common mode voltage (V CM ) and the lower external voltage (V GND );
floating an upper internal voltage (V INTP ) to V MAX or a lower internal voltage (V INTN ) to V MIN based on V CM ; and
regulating a voltage range between V INTP and V INTN to generate the floating voltage range.
13 . The method for generating a floating voltage range according to claim 12 , wherein the V CM is in a range that includes positive and negative voltages.
14 . The method for generating a floating voltage range according to claim 12 , wherein:
generating V MAX includes using a first pair of diodes to switch the larger of V CM and V DD to a first output of a selector circuit; and
generating V MIN includes using a second pair of diodes to switch the smaller of V CM and V GND to a second output of the selector circuit.
15 . The method for generating a floating voltage range according to claim 14 , wherein:
the first pair of diodes and the second pair of diodes are Schottky diodes.
16 . The method for generating a floating voltage range according to claim 12 , wherein:
generating V MAX includes using a first pair of transistors to switch the larger of V CM and V DD to a first output of a selector circuit; and
generating V MIN includes using a second pair of transistors to switch the smaller of V CM and V GND to a second output of the selector circuit.
17 . The method for generating a floating voltage range according to claim 14 , wherein:
the first pair of transistors are PMOS transistors, and the second pair of transistors are NMOS transistors.
18 . The method for generating a floating voltage range according to claim 12 , wherein the
floating V INTP to V MAX or V INTN to V MIN based on V CM includes:
coupling V INTP to V MAX when V CM is greater than V DD ; and
coupling V INTN to V MIN when V CM is less than V GND .
19 . The method for generating a floating voltage range according to claim 12 , wherein the regulating a voltage range between V INTP and V INTN to generate the floating voltage range includes:
biasing a regulation device between V INTP and V INTN to generate the voltage range between V INTP and V INTN .
20 . A floating power supply comprising:
a selector circuit configured to receive a common mode voltage (V CM ), an upper external voltage (V DD ), and a lower external voltage (V GND ), the selector circuit including:
a maximum voltage (V MAX ) circuit configured to output the larger of V CM and V DD as V MAX ; and
a minimum voltage (V MIN ) circuit configured to output the smaller of V CM and V GND as V MIN ; and
a floating supply circuit configured to receive V MAX and V MIN from the selector circuit and to output an upper internal voltage (V INTP ) and a lower internal voltage (V INTN ), the floating supply circuit including:
a regulation device configured to maintain a voltage difference between V INTP and V INTN ;
a first transistor configured to pull-up V INTP to V MAX when V CM is larger than V DD ; and
a second transistor configured to pull-down V INTN to V MIN when V CM is smaller than V GND .