Semiconductor substrate processing methods
Implementations of a method of forming a plurality of semiconductor devices on a semiconductor substrate may include: providing a semiconductor substrate having a first surface, a second surface, a size, and a thickness where the second surface opposes the first surface and the thickness is between the first surface and the second surface. The method may include processing the semiconductor substrate through a plurality of semiconductor device fabrication processes to form a plurality of semiconductor devices on the first surface. The thickness may be between 100 microns and 575 microns and the size may be 150 mm. The semiconductor substrate may not be coupled with a carrier or support.
1. A method of forming a plurality of semiconductor devices on a semiconductor substrate, the method comprising:
providing a semiconductor substrate comprising a first surface, a second surface, a size, and a thickness where the second surface opposes the first surface and the thickness is between the first surface and the second surface; and
processing the semiconductor substrate through a plurality of semiconductor device fabrication processes to form a plurality of semiconductor devices on the first surface;
wherein the thickness is between 70 microns and 200 microns and the size is 100 millimeters;
wherein the thickness is a pre-processed thickness prior to forming the plurality of semiconductor devices on the first surface; and
wherein the semiconductor substrate is configured to directly couple to a chuck during the processing of the semiconductor substrate.
2. The method of claim 1 , further comprising backgrinding the second surface of the semiconductor substrate to reduce the thickness to a desired value.
3. The method of claim 1 , further comprising singulating the semiconductor substrate to singulate the plurality of semiconductor devices.
4. The method of claim 1 , wherein providing the semiconductor substrate further comprises:
forming the semiconductor substrate from a boule; and
one of grinding and polishing one of the first surface or the second surface of the semiconductor substrate to thin the thickness to between 70 microns and 200 microns.
5. The method of claim 1 , wherein providing the semiconductor substrate further comprises:
forming the semiconductor substrate from a boule with the thickness between 70 microns and 200 microns; and
one of grinding and polishing one of the first surface or the second surface to flatten one of the first surface or the second surface.
6. The method of claim 1 , wherein the thickness is between 70 microns and 200 microns during each of the plurality of semiconductor device fabrication processes.
7. A method of forming a plurality of semiconductor devices on a semiconductor substrate, the method comprising:
providing a semiconductor substrate comprising a first surface, a second surface, a size, and a thickness where the second surface opposes the first surface and the thickness is between the first surface and the second surface; and
processing the semiconductor substrate through a plurality of semiconductor device fabrication processes to form a plurality of semiconductor devices on the first surface;
wherein the thickness is between 100 microns and 575 microns and the size is 150 millimeters;
wherein the thickness is a pre-processed thickness prior to forming the plurality of semiconductor devices on the first surface; and
wherein the semiconductor substrate is self-supporting during the processing.
8. The method of claim 7 , further comprising backgrinding the second surface of the semiconductor substrate to reduce the thickness to a desired value.
9. The method of claim 7 , further comprising singulating the semiconductor substrate to singulate the plurality of semiconductor devices.
10. The method of claim 7 , wherein providing the semiconductor substrate further comprises:
forming the semiconductor substrate from a boule; and
one of grinding and polishing one of the first surface or the second surface of the semiconductor substrate to thin the thickness to between 100 microns and 575 microns.
11. The method of claim 7 , wherein providing the semiconductor substrate further comprises:
forming the semiconductor substrate from a boule with the thickness between 100 microns and 575 microns; and
one of grinding and polishing one of the first surface or the second surface to flatten one of the first surface or second surface.
12. The method of claim 7 , wherein the thickness is between 100 microns and 575 microns during each of the plurality of semiconductor device fabrication processes.
13. A method of forming a plurality of semiconductor devices on a semiconductor substrate, the method comprising:
providing a semiconductor substrate comprising a first surface, a second surface, a size, and a thickness where the second surface opposes the first surface and the thickness is between the first surface and the second surface; and
processing the semiconductor substrate through a plurality of semiconductor device fabrication processes to form a plurality of semiconductor devices on the first surface;
wherein the thickness is between 120 microns and 600 microns and the size is 200 millimeters;
wherein the thickness is a pre-processed thickness prior to forming the plurality of semiconductor devices on the first surface; and
wherein the semiconductor substrate is self-supporting during the processing.
14. The method of claim 13 , further comprising backgrinding the second surface of the semiconductor substrate to reduce the thickness to a desired value.
15. The method of claim 13 , further comprising singulating the semiconductor substrate to singulate the plurality of semiconductor devices.
16. The method of claim 13 , wherein providing the semiconductor substrate further comprises:
forming the semiconductor substrate from a boule; and
one of grinding and polishing one of the first surface or the second surface of the semiconductor substrate to thin the thickness to between 120 microns and 600 microns.
17. The method of claim 13 , wherein the thickness is between 120 microns and 600 microns during each of the plurality of semiconductor device fabrication processes.