IP Library Granted Patent US 11,830,784
Granted Patent B2
US 11,830,784 · App. 17/447,011 · Granted Nov 28, 2023

Leadframe spacer for double-sided power module

Inventors: Tzu-Hsuan Cheng (Scarborough, ME); Yong Liu (Cumberland Foreside, ME); Liangbiao Chen (Scarborough, ME)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/3675H01L21/52H01L21/565H01L23/3735H01L23/49575H01L24/32H01L24/33H05K7/2089H01L23/49524H01L23/49551H01L23/49562H01L2224/32245H01L2224/40245H01L2224/84801H01L2924/13055
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Quick Facts
Patent No.
US 11,830,784
App. No.
17/447,011
Granted
Nov 28, 2023
Kind
B2
Abstract

A semiconductor device module may include a leadframe spacer that provides the functions of both a leadframe and a spacer, while enabling a double-sided cooling configuration. Such a leadframe spacer may include a leadframe surface that provides a die attach pad (DAP) that is shared by at least two semiconductor devices. The leadframe spacer may include at least one downset, where the semiconductor devices may be attached within a recess defined by the at least one downset. A first substrate may be connected to a first side of the leadframe. A second substrate may be connected to downset surfaces of the at least one downset, and positioned for further connection to the semiconductor devices in a double-sided assembly.

Claims (44)

1. A method of manufacturing a semiconductor device module, comprising:

attaching a first substrate to a first side of a leadframe spacer, the leadframe spacer having a second side, the second side having a first downset with a first downset surface and a second downset with a second downset surface;

attaching a second substrate to the first downset surface and the second downset surface;

attaching a first semiconductor device to the second side of the leadframe spacer and to the second substrate; and

attaching a second semiconductor device to the second side of the leadframe spacer and to the second substrate.

2. The method of claim 1 , further comprising:

attaching the first semiconductor device and the second semiconductor device within a recess defined by the first downset and the second downset, and at least partially enclosed by the second substrate.

3. The method of claim 1 , further comprising:

soldering a first portion of the second substrate to the first semiconductor device; and

soldering a second portion of the second substrate to both of the first semiconductor device and the second semiconductor device.

4. The method of claim 1 , wherein attaching the first semiconductor device and the second semiconductor device comprises:

soldering the first semiconductor device and the second semiconductor device to the second side of the leadframe spacer at a first soldering temperature.

5. The method of claim 4 , wherein attaching the second substrate comprises:

soldering the second substrate to the first downset surface, to the second downset surface, the first semiconductor device, and the second semiconductor device, at a second soldering temperature that is less than the first soldering temperature.

6. The method of claim 5 , wherein attaching the first substrate comprises:

soldering the first substrate to the first side of the leadframe spacer at a third soldering temperature that is less than the second soldering temperature.

7. The method of claim 1 , further comprising:

attaching the first substrate to the first side of the leadframe spacer after attaching the second substrate to the first downset surface and the second downset surface.

8. The method of claim 1 , further comprising:

performing injection molding of the leadframe spacer, the first semiconductor device, the second semiconductor device, the first substrate and the second substrate.

9. The method of claim 1 , wherein the first downset includes a downset portion that is substantially perpendicular to a surface on the second side of the leadframe spacer on which the first semiconductor device and the second semiconductor device are mounted.

10. The method of claim 1 , wherein the leadframe spacer is formed using a single metal piece.

11. The method of claim 1 , wherein the first semiconductor device includes an insulated gate bipolar transistor (IGBT), and the second semiconductor device includes a diode.

12. A method of manufacturing a semiconductor device module, comprising:

attaching a first substrate to a first side of a leadframe spacer, the leadframe spacer including a first downset and a second downset defining a recess that provides a die attach pad (DAP) on a second side of the leadframe spacer that is opposite the first side;

attaching a first semiconductor device and a second semiconductor device to the DAP; and

attaching a second substrate to the second side of the leadframe spacer on a first downset surface of the first downset and on a second downset surface of the second downset, and at least partially enclosing the first semiconductor device and the second semiconductor device within the recess.

13. The method of claim 12 , wherein attaching the first semiconductor device and the second semiconductor device comprises:

soldering a first portion of the second substrate to the first semiconductor device; and

soldering a second portion of the second substrate to both of the first semiconductor device and the second semiconductor device.

14. The method of claim 12 , wherein attaching the first semiconductor device and the second semiconductor device comprises:

soldering the first semiconductor device and the second semiconductor device to the DAP at a first soldering temperature.

15. The method of claim 14 , wherein attaching the second substrate comprises:

soldering the second substrate to the first downset surface, the second downset surface, the first semiconductor device, and the second semiconductor device at a second soldering temperature that is less than the first soldering temperature.

16. The method of claim 15 , wherein mounting the first substrate comprises:

soldering the first substrate to the first side of the leadframe spacer at a third soldering temperature that is less than the second soldering temperature.

17. The method of claim 16 , further comprising:

attaching the first substrate to the first side of the leadframe spacer after attaching the second substrate to the first downset surface and the second downset surface.

18. A method of manufacturing a semiconductor device module, comprising:

attaching a first semiconductor device and a second semiconductor device to a leadframe spacer, the leadframe spacer including a first downset and a second downset defining a recess that provides a die attach pad (DAP), the first semiconductor device and a second semiconductor device being attached to the DAP within the recess; and

attaching a device-side substrate to the first downset, the second downset, the first semiconductor device, and the second semiconductor device, after the attaching of the first semiconductor device and the second semiconductor device to the leadframe spacer, the device-side substrate at least partially enclosing the first semiconductor device and the second semiconductor device within the recess.

19. The method of claim 18 , comprising:

attaching an opposing-side substrate to the leadframe spacer on a surface of the leadframe spacer opposing the DAP on which the first semiconductor device and the second semiconductor device are attached, after the attaching of the device-side substrate.

20. The method of claim 18 , wherein the leadframe spacer is formed using a single metal piece.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 058828, FRAME 0123 Recorded Aug 16, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064615/0449 →
SECURITY INTEREST Recorded Nov 5, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058828/0123 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2021
From: CHENG, TZU-HSUAN; LIU, YONG; CHEN, LIANGBIAO
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057401/0474 →
Cited By (1)
US 12,400,965