Compartment shielding with metal frame and cap
A semiconductor device has a substrate and a first semiconductor die disposed over the substrate. A first metal frame is disposed over the substrate around the first semiconductor die. A first metal lid is disposed over the first metal frame. A flap of the first metal lid includes an elastic characteristic to latch onto the first metal frame. An edge of the flap can have a castellated edge. A recess in the first metal frame and a protrusion on the first metal lid can be used to latch the first metal lid onto the first metal frame. A second metal frame and second metal lid can be disposed over an opposite surface of the substrate from the first metal frame.
1. A method of making a semiconductor device, comprising:
providing a substrate;
disposing a first semiconductor die over a first surface of the substrate;
disposing a first metal frame over the substrate around the first semiconductor die;
disposing a first metal lid over the first metal frame, wherein a flap of the first metal lid includes an elastic characteristic to latch onto the first metal frame;
disposing a second metal frame over a second surface of the substrate opposite the first surface;
disposing a second metal lid over the second metal frame; and
disposing a solder bump over the second surface of the substrate, wherein a height of the solder bump is greater than a height of the second metal frame and second metal lid.
2. The method of claim 1 , further including forming a castellated edge on the flap.
3. The method of claim 1 , further including:
forming a recess in the first metal frame; and
forming a protrusion on the first metal lid, wherein the protrusion aligns to the recess when the first metal lid is latched onto the first metal frame.
4. The method of claim 1 , further including forming a plurality of flaps as part of the first metal frame, wherein the plurality of flaps is folded to create sidewalls extending around a perimeter of the first metal frame.
5. The method of claim 4 , wherein a first flap of the plurality of flaps is formed interior to the frame.
6. The method of claim 5 , further including disposing a second semiconductor die over the substrate, wherein the first flap is disposed between the first semiconductor die and second semiconductor die.
7. The method of claim 5 , wherein a second flap of the plurality of flaps is formed interior to the frame and oriented perpendicular to the first flap, and wherein the first flap and second flap each extend only partially across a length or width of the frame.
8. A semiconductor device, comprising:
a substrate;
a first semiconductor die disposed over a first surface of the substrate;
a first metal frame disposed over the first surface of the substrate around the first semiconductor die;
a first metal lid disposed over the first metal frame, wherein a flap of the first metal lid includes an elastic characteristic to latch onto the first metal frame;
a second metal frame disposed over a second surface of the substrate opposite the first surface;
a second metal lid disposed over the second metal frame; and
a solder bump disposed over the second surface of the substrate, wherein a height of the solder bump is greater than a height of the second metal frame and second metal lid.
9. The semiconductor device of claim 8 , wherein the flap includes a castellated edge.
10. The semiconductor device of claim 8 , further including:
a recess formed in the first metal frame; and
a protrusion formed on the first metal lid, wherein the protrusion extends into the recess.
11. The semiconductor device of claim 8 , wherein the first metal frame includes a plurality of flaps, and wherein the plurality of flaps is folded to create sidewalls extending around a perimeter of the first metal frame.
12. The semiconductor device of claim 11 , wherein a first flap of the plurality of flaps is formed interior to the first metal frame.
13. The semiconductor device of claim 12 , further including a second semiconductor die disposed over the substrate, wherein the first flap is disposed between the first semiconductor die and second semiconductor die.