Semiconductor device having a super junction structure and method of manufacturing the same
A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.
1. A method of manufacturing a semiconductor device having a super junction, the method comprising:
preparing a semiconductor substrate that includes an active region and a termination region surrounding the active region;
epitaxially forming a first undoped epitaxial layer over the semiconductor substrate, the first undoped epitaxial layer having a first thickness;
implanting dopants of a first conductive type in an entire top surface of the first undoped epitaxial layer to form a first doped layer of the first conductive type;
implanting dopants of a second conductive type in predetermined portions of the first doped layer;
epitaxially forming a second undoped epitaxial layer over the first doped layer, the second undoped epitaxial layer having a second thickness that is smaller than the first thickness;
implanting dopants of the first conductive type in an entire top surface of the second undoped epitaxial layer to form a second doped layer of the first conductive type;
implanting dopants of the second conductive type in predetermined portions of the second doped layer;
epitaxially forming a third undoped epitaxial layer over the second doped layer, the third undoped epitaxial layer having a third thickness that is smaller than the second thickness;
implanting dopants of the first conductive type in an entire top surface of the third undoped epitaxial layer to form a third doped layer of the first conductive type;
implanting dopants of the second conductive type in predetermined portions of the third doped layer; and
diffusing dopants of at least the first, second, and third doped layers to the first, second, and third undoped epitaxial layers in order to form a blocking layer in the active region and to form a termination pillar in the termination region, the blocking layer comprising a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction.
2. The method of claim 1 , wherein the first conductive type is N-type and the second conductive type is P-type.
3. The method of claim 1 , wherein a density profile of dopants of the first conductive type is uniform in the horizontal direction in both the first and second conductive type pillars in the blocking layer.
4. The method of claim 1 , wherein diffusing dopants from at least the first and second doped layers is by thermal treatment.
5. The method of claim 1 , wherein a density profile of dopants of the first conductive type is uniform in the horizontal direction in both the first and second conductive type pillars, and the density profile of dopants of the first conductive type varies in the vertical direction in the blocking layer.
6. The method of claim 1 , further comprising forming a first conductive type epi-layer between the first undoped epitaxial layer and the semiconductor substrate.
7. The method of claim 1 , wherein the termination pillar comprises a first conductive type termination pillar and a second conductive type termination pillar.
8. The method of claim 1 , wherein diffusing dopants of at least the first, second, and third doped layers further comprises:
diffusing the dopants of the at least the first, second, and third doped layers to form an edge second conductive type pillar that is disposed between the active region and the termination region to surround the active region,
wherein the edge second conductive type pillar is coupled to a source electrode.
9. The method of claim 1 , further comprising:
forming a gate oxide layer over the first conductive type pillar;
forming a gate electrode over the gate oxide layer;
forming a body layer in an upper region of the second conductive type pillar;
forming at least one source region in the body layer; and
forming a source electrode electrically connected to the at least one source region.
10. The method of claim 1 , further comprising, before the diffusing:
forming a top undoped epitaxial layer over the third doped layer that is the uppermost layer; and
implanting dopants of the first conductive type in an upper region of the top undoped epitaxial layer.