Semiconductor device

1. A semiconductor device including a transistor region, comprising:

an insulating film provided on a semiconductor substrate;

an emitter electrode contacting the semiconductor substrate and the insulating film;

a dummy trench portion provided in the transistor region and including a long portion that extends in a first direction, the dummy trench portion being electrically connected to the emitter electrode through a first portion in which the insulating film is not provided; and

a first contact portion, provided between the first portion and an end portion of the semiconductor substrate in the first direction and electrically connecting the emitter electrode and a semiconductor region with a first conductivity type that is provided in the semiconductor substrate,

wherein the first contact portion includes a region extending in the first direction.

2. The semiconductor device according to claim 1 , wherein

the dummy trench portion includes: a dummy trench; a dummy trench insulating film provided in an inner wall of the dummy trench; and a dummy conducting portion provided inside the dummy trench insulating film as a conductive material.

3. The semiconductor device according to claim 2 , further comprising:

a gate trench portion provided in the transistor region and including a long portion that extends in the first direction.

4. The semiconductor device according to claim 3 , wherein

the gate trench portion includes: a gate trench; a gate insulating film provided in an inner wall of the gate trench; and a gate conducting portion provided inside the gate insulating film as a conductive material.

5. The semiconductor device according to claim 4 , wherein

the region extending in the first direction in the first contact portion is provided between the dummy trench portion and the gate trench portion in a second direction that is orthogonal to the first direction.

6. The semiconductor device according to claim 5 , further comprising:

an emitter region with a second conductivity type provided in the semiconductor substrate; and

a base region with a first conductivity type provided in the semiconductor substrate,

wherein

a carrier concentration of the semiconductor region with the first conductivity type is higher than that of the base region, and

the emitter region and the base region are provided in a mesa region, the mesa region being a portion of the semiconductor substrate, sandwiched between the long portion of the dummy trench portion and the long portion of the gate trench portion in a second direction that is orthogonal to the first direction.

7. The semiconductor device according to claim 6 , wherein

the base region is provided continuously from the semiconductor region with the first conductivity type to which the first contact portion is connected to the mesa region.

8. The semiconductor device according to claim 7 , wherein

the first portion is formed father outward than the emitter region in the first direction.

9. The semiconductor device according to claim 8 , wherein

the region extending in the first direction in the first contact portion does not overlap with the dummy trench portion or the gate trench portion.

10. The semiconductor device according to claim 9 , further comprising:

a gate material layer positioned outside of an active region; wherein

the semiconductor region with the first conductivity type is provided continuously at least from below the first contact portion to below the gate metal layer.

11. The semiconductor device according to claim 9 , wherein

the dummy trench portion further includes: a short portion that extends in the second direction and is connected to an end portion of the long portion in the first direction of the dummy trench portion.

12. The semiconductor device according to claim 11 , further comprising:

a connection layer electrically connected to at least the dummy conducting portion of the short portion through the first portion.

13. The semiconductor device according to claim 12 , wherein

the dummy conducting portion and the connection layer are configured to include polysilicon, and

the dummy conducting portion and the connection layer are formed continuously.

14. The semiconductor device according to claim 12 , wherein

the first contact portion is provided between an end portion of the dummy trench portion and an end portion of the semiconductor substrate in the first direction.

15. The semiconductor device according to claim 12 , wherein

the connection layer includes a connection layer contact portion electrically connected to the emitter electrode, and

the first contact portion is provided between the connection layer contact portion and an end portion of the emitter electrode in the first direction.

16. The semiconductor device according to claim 14 , wherein

the gate trench portion further includes: a short portion that extends in the second direction and is connected to an end portion of the long portion in the first direction of the gate trench portion.

17. The semiconductor device according to claim 16 , wherein

the gate trench portion surrounds the dummy trench portion.

18. The semiconductor device according to claim 16 , wherein

an end portion of the long portion in the first direction of the gate trench portion is positioned farther outward than an end portion of the long portion in the first direction of the gate trench potion.

19. The semiconductor device according to claim 16 , wherein

a length of the end portion of the long portion in the first direction of the gate trench portion is longer than that of the end portion of the long portion in the first direction of the gate trench potion.

20. The semiconductor device according to claim 19 , wherein

the first contact portion includes a main region that extends in the second direction; and

the region that extends in the first direction in the first contact region is a sub region that is connected to the main region.