IP Library Granted Patent US 12,566,891
Granted Patent B2
US 12,566,891 · App. 17/457,298 · Granted Mar 3, 2026

Higher-layer-processing data in time-sensitive data blocks at a physical-layer-interface device

Inventors: Brian Branscomb (Hopkinton, MA); William Mahany (West Islip, NY); Sailesh Rupani (Telengana, IN)
Assignee: Microchip Technology Incorporated
G06F21/64
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Quick Facts
Patent No.
US 12,566,891
App. No.
17/457,298
Granted
Mar 3, 2026
Kind
B2
Abstract

Examples of the present disclosure relate generally to implementing higher-layer processing on time-sensitive data blocks at a physical-layer-interface device. Some examples include logic to perform operations, the operations including providing data blocks to a physical-layer-interface device. The operations may also include adding dummy data into one or more time-sensitive data blocks of the data blocks being provided to the physical-layer-interface device. A size of the dummy data corresponding to a size of higher-layer-processing data. Other example operations may include removing higher-layer-processing data from a first ingressing data block. The other operations may also include removing a portion of the first ingressing data block and adding the portion to a subsequent ingressing data block. A size of the portion corresponding to the size of integrity-detection data. The other operations may also include removing the integrity-detection data from an ingressing data block. Related methods, systems, and devices are also disclosed.

Claims (45)

1 . An apparatus comprising:

a circuit configured to provide data blocks to a physical-layer interface device, wherein the physical layer device includes logic configured to perform higher-layer processing on received data blocks, wherein the higher-layer processing includes operations associated with Open Systems Interconnection (OSI) layer 2 or higher and comprises adding higher-layer-processing data to the data blocks; and

a logic circuit configured to:

add dummy data into one or more time-sensitive data blocks of the data blocks, a size of the dummy data corresponding to a size of higher-layer-processing data such that the addition of the higher-layer-processing data at the physical-layer interface device does not disrupt timing of the one or more time-sensitive data blocks according to a time-sensitive networking (TSN) protocol; and

provide the data blocks, including the one or more time-sensitive data blocks, to the physical-layer interface device.

2 . The apparatus of claim 1 , wherein the higher-layer-processing data is related to one or more of: Media Access Control security, Internet Protocol security, a cryptographic process, and encapsulation.

3 . The apparatus of claim 1 , wherein time sensitivity of the data blocks is related to Time-Sensitive Networking.

4 . The apparatus of claim 1 , wherein the data blocks comprise one or more of Ethernet frames and Ethernet frame fragments.

5 . The apparatus of claim 1 , wherein:

the higher-layer-processing data comprises a security tag and integrity-detection data; the size of the security tag is a first number of bytes;

the size of the integrity-detection data is a second number of bytes; and

the size of the dummy data is a sum of the first number of bytes and the second number of bytes.

6 . The apparatus of claim 1 , comprising: the physical-layer-interface device including the logic configured to perform higher-layer processing on the received data blocks.

7 . A method comprising:

providing data blocks to a physical-layer-interface device, wherein the physical-layer interface includes logic configured to perform higher-layer processing on received data blocks, wherein the higher-layer processing includes operations associated with Open Systems Interconnection (OSI) layer 2 or higher and comprises adding higher-layer-processing data to the data blocks; and

adding dummy data into one or more time-sensitive data blocks of the data blocks being provided to the physical-layer-interface device, a size of the dummy data corresponding to a size of higher-layer-processing data such that the addition of the higher-layer-processing data at the physical-layer-interface device does not disrupt timing of the one or more time-sensitive data blocks according to a time-sensitive networking (TSN) protocol.

8 . The method of claim 7 , comprising egressing the data blocks at the physical-layer-interface device.

9 . The method of claim 7 , comprising while providing the data blocks to the physical-layer-interface device, waiting to provide each of one or more time-sensitive data blocks by a predetermined duration.

10 . The method of claim 9 , wherein:

the higher-layer-processing data comprises a security tag;

the size of the higher-layer-processing data is a first number of bytes; and the size of the dummy data is the first number of bytes.

11 . The method of claim 9 , wherein:

a size of integrity-detection data is a first number of bytes; and

the predetermined duration corresponds to a transmission time related to the first number of bytes.

12 . An apparatus, comprising: a physical-layer interface device, the physical-layer interface device configured to:

receive data blocks;

remove higher-layer-processing data from a first ingressing data block of the received data blocks, wherein the higher-layer processing of the higher-layer processing data includes operations associated with Open Systems Interconnection (OSI) layer 2 or higher and comprises removing higher-layer-processing data from the data blocks, wherein the higher-layer processing data removed from the first ingressing data block includes integrity-detection data;

remove a portion of the first ingressing data block; and

add the portion of the first ingressing data block to a subsequent ingressing data block, a size of the portion corresponding to a size of integrity-detection data such that the removal of the higher-layer-processing data at the physical-layer interface device does not render the ingressing data blocks too short according to a time-sensitive networking (TSN) protocol.

13 . The apparatus of claim 12 , wherein the higher-layer-processing data comprises data related to one or more of: Media Access Control security, Internet Protocol security, a cryptographic process, and encapsulation.

14 . The apparatus of claim 12 , wherein the received data blocks are time sensitive, time sensitivity of the received data blocks related to Time-Sensitive Networking.

15 . The apparatus of claim 12 , wherein the data blocks comprise Ethernet frame fragments.

16 . The apparatus of claim 12 , wherein the higher-layer-processing data comprises a security tag.

17 . The apparatus of claim 12 , wherein:

the size of the integrity-detection data is a first number of bytes; and the size of the portion is the first number of bytes.

18 . A method, comprising:

receiving data blocks;

removing higher-layer-processing data from a first ingressing data block of the received data blocks, wherein the higher-layer processing of the higher-layer processing data includes operations associated with Open Systems Interconnection (OSI) layer 2 or higher and comprises removing higher-layer-processing data from the data blocks, wherein removing the higher-layer processing data from the first ingressing data block includes removing integrity-detection data from the first ingressing data block; and

removing a portion of the first ingressing data block; and

adding the portion to a subsequent ingressing data block, a size of the portion corresponding to a size of integrity-detection data such that the removal of the higher-layer-processing data at a physical-layer interface device does not render the ingressing data blocks too short according to a time-sensitive networking (TSN) protocol.

19 . The method of claim 18 , wherein removing the integrity-detection data from the ingressing data block comprises removing the integrity-detection data from the subsequent ingressing data block.

20 . The method of claim 18 , comprising: removing from each of a number of ingressing data blocks a corresponding portion and adding a respective corresponding portion to an immediately-subsequent ingressing data block of the number of ingressing data blocks, a size of the corresponding portions corresponding to the size of the integrity-detection data.

21 . The method of claim 18 , comprising while receiving the data blocks, inserting dummy data into the first ingressing data block, a size of the dummy data corresponding to a sum of a size of the higher-layer-processing data and a size of the integrity-detection data.

22 . The apparatus of claim 1 , wherein the higher-layer processing includes operations associated with Open Systems Interconnection (OSI) layer 2 or higher.

23 . The method of claim 7 , wherein the higher-layer processing includes operations associated with Open Systems Interconnection (OSI) layer 2 or higher.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2021
From: BRANSCOMB, BRIAN; MAHANY, WILLIAM; RUPANI, SAILESH
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 058303/0828 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2021
From: BRANSCOMB, BRIAN; MAHANY, WILLIAM
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 058267/0948 →
Continuity (2)
Provisional Application 63199058 · Dec 4, 2020
Related Publication 20220179997A1 · Jun 9, 2022
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