IP Library › Granted Patent US 12,009,413
Granted Patent B2
US 12,009,413 · App. 17/457,320 · Granted Jun 11, 2024

Semiconductor device and method for manufacturing the same

Inventor: Katsumi Nakamura (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L29/7397H01L29/66325
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Quick Facts
Patent No.
US 12,009,413
App. No.
17/457,320
Granted
Jun 11, 2024
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate, a drift layer of a first conductivity type, a buffer layer of the first conductivity type, a first semiconductor layer, and a second semiconductor layer. The first semiconductor layer and the second semiconductor layer are provided on the side of the second main surface of the semiconductor substrate with respect to the buffer layer. The first semiconductor layer and the second semiconductor layer are arranged in this order in a direction from the second main surface toward the first main surface of the semiconductor substrate. The first semiconductor layer and the second semiconductor layer have conductivity types identical to each other. The second semiconductor layer has a larger number of atoms of impurities per unit volume than the first semiconductor layer.

Claims (85)

1. A semiconductor device comprising:

a semiconductor substrate including a first main surface and a second main surface opposite to the first main surface;

a drift layer of a first conductivity type provided between the first main surface and the second main surface of the semiconductor substrate;

a buffer layer of the first conductivity type provided on a second main surface side with respect to the drift layer and having a larger number of atoms of impurities per unit volume than the drift layer; and

a dual-layer semiconductor layer comprising a first semiconductor layer and a second semiconductor layer, provided on the second main surface side with respect to the buffer layer, the first semiconductor layer and the second semiconductor layer being arranged in this order in a direction from the second main surface toward the first main surface,

wherein the first semiconductor layer and the second semiconductor layer have conductivity types identical to each other,

the second semiconductor layer has a larger number of atoms of impurities per unit volume than the first semiconductor layer,

the first semiconductor layer directly contacts the second semiconductor layer, and

the dual-layer semiconductor layer has two consecutive peaks for the number of atoms of impurities per unit volume from the second main surface side of the dual-layer semiconductor layer toward the first main surface side of the dual-layer semiconductor layer, each of the first semiconductor layer and the second semiconductor layer having one of the two peaks.

2. The semiconductor device according to claim 1 , further comprising an electrode in which a plurality of metal layers are stacked on the second main surface of the semiconductor substrate.

3. The semiconductor device according to claim 2 , wherein, of the plurality of metal layers, a metal layer in contact with the second main surface of the semiconductor substrate contains NiSi.

4. The semiconductor device according to claim 2 , wherein

of the plurality of metal layers, a metal layer in contact with the second main surface of the semiconductor substrate contains AlSi, and

a concentration of Si contained in the AlSi is 1% or more and 3% or less.

5. The semiconductor device according to claim 1 , wherein the number of atoms of impurities per unit area in the first semiconductor layer and the number of atoms of impurities per unit area in the second semiconductor layer satisfy a relation of:

D 2 /D 1 ≥0.07.

6. The semiconductor device according to claim 1 , further comprising:

a base layer of a second conductivity type provided on a first main surface side with respect to the drift layer;

an emitter layer of the first conductivity type provided as a surface layer of the semiconductor substrate on the first main surface side with respect to the base layer and forming the first main surface; and

a gate electrode provided inside a trench penetrating the emitter layer and the base layer from the first main surface with an interposition of an insulating film,

wherein the first semiconductor layer and the second semiconductor layer have the second conductivity type, and

the emitter layer, the base layer, the drift layer, the buffer layer, the first semiconductor layer, the second semiconductor layer, and the gate electrode form an insulated gate bipolar transistor.

7. The semiconductor device according to claim 1 , further comprising an anode layer of a second conductivity type provided on a first main surface side with respect to the drift layer,

wherein the first semiconductor layer and the second semiconductor layer have the first conductivity type.

8. The semiconductor device according to claim 1 , further comprising an anode layer of a second conductivity type provided on a first main surface side with respect to the drift layer,

wherein the first semiconductor layer and the second semiconductor layer include a region having the first conductivity type and a region having the second conductivity type which are alternately arranged in a direction in which the second main surface extends.

9. The semiconductor device according to claim 1 , wherein

the semiconductor substrate includes an IGBT region in which an IGBT is formed and a diode region in which a diode is formed,

the IGBT region includes:

the first semiconductor layer;

the second semiconductor layer;

the drift layer;

a base layer of a second conductivity type provided on a first main surface side with respect to the drift layer;

an emitter layer of the first conductivity type provided as a surface layer of the semiconductor substrate on the first main surface side with respect to the base layer and forming the first main surface; and

a gate electrode provided inside a trench penetrating the emitter layer and the base layer from the first main surface with an interposition of an insulating film,

the first semiconductor layer and the second semiconductor layer in the IGBT region have the second conductivity type,

the diode region includes:

the first semiconductor layer;

the second semiconductor layer;

the drift layer; and

an anode layer of the second conductivity type provided on the first main surface side with respect to the drift layer, and

the first semiconductor layer and the second semiconductor layer in the diode region have the first conductivity type.

10. The semiconductor device according to claim 1 , wherein

the semiconductor substrate includes an IGBT region in which an IGBT is formed and a diode region in which a diode is formed,

the IGBT region includes:

the first semiconductor layer;

the second semiconductor layer;

the drift layer;

a base layer of a second conductivity type provided on a first main surface side with respect to the drift layer;

an emitter layer of the first conductivity type provided as a surface layer of the semiconductor substrate on the first main surface side with respect to the base layer and forming the first main surface; and

a gate electrode provided inside a trench penetrating the emitter layer and the base layer from the first main surface with an interposition of an insulating film,

the first semiconductor layer and the second semiconductor layer in the IGBT region have the second conductivity type,

the diode region includes:

the first semiconductor layer;

the second semiconductor layer;

the drift layer; and

an anode layer of the second conductivity type provided on the first main surface side with respect to the drift layer, and

the first semiconductor layer and the second semiconductor layer in the diode region include a region having the first conductivity type and a region having the second conductivity type which are alternately arranged in a direction in which the second main surface extends.

11. The semiconductor device according to claim 7 , further comprising a contact layer of the second conductivity type provided as a surface layer of the semiconductor substrate on the first main surface side with respect to the anode layer and forming the first main surface.

12. The semiconductor device according to claim 7 , wherein the anode layer is a surface layer of the semiconductor substrate, and forms the first main surface.

13. A semiconductor device comprising:

a semiconductor substrate including a first main surface and a second main surface opposite to the first main surface;

a drift layer of a first conductivity type provided between the first main surface and the second main surface of the semiconductor substrate;

a buffer layer of the first conductivity type provided on a second main surface side with respect to the drift layer and having a larger number of atoms of impurities per unit volume than the drift layer; and

a first semiconductor layer and a second semiconductor layer, provided on the second main surface side with respect to the buffer layer and arranged in this order in a direction from the second main surface toward the first main surface,

wherein the first semiconductor layer and the second semiconductor layer have conductivity types identical to each other,

the second semiconductor layer has a larger number of atoms of impurities per unit volume than the first semiconductor layer,

the first semiconductor layer has a peak for the number of atoms of impurities per unit volume in the direction from the second main surface toward the first main surface,

the second semiconductor layer has a peak for the number of atoms of impurities per unit volume in the direction from the second main surface toward the first main surface, and

a depth from the second main surface at which the peak of the number of atoms per unit volume in the first semiconductor layer is positioned and a depth from the second main surface at which the peak of the number of atoms per unit volume in the second semiconductor layer is positioned satisfy a relation of:

R 2 /R 1 =5.0.

14. A semiconductor device comprising:

a semiconductor substrate including a first main surface and a second main surface opposite to the first main surface;

a drift layer of a first conductivity type provided between the first main surface and the second main surface of the semiconductor substrate;

a buffer layer of the first conductivity type provided on a second main surface side with respect to the drift layer and having a larger number of atoms of impurities per unit volume than the drift layer; and

a first semiconductor layer and a second semiconductor layer, provided on the second main surface side with respect to the buffer layer and arranged in this order in a direction from the second main surface toward the first main surface,

wherein the first semiconductor layer and the second semiconductor layer have conductivity types identical to each other,

the second semiconductor layer has a larger number of atoms of impurities per unit volume than the first semiconductor layer,

the buffer layer has a plurality of peaks for the number of atoms of impurities per unit volume in the direction from the second main surface toward the first main surface, and

the plurality of peaks are heightened as nearing toward the second main surface.

15. The semiconductor device according to claim 14 , wherein

of the plurality of peaks in the buffer layer, the impurity corresponding to a peak close to the second main surface is phosphorus or arsenic, and

of the plurality of peaks in the buffer layer, the impurity corresponding to a peak closer to the first main surface than the peak close to the second main surface is an element other than phosphorus and arsenic.

16. The semiconductor device according to claim 14 , wherein, of the plurality of peaks in the buffer layer, a maximum peak is lower than a peak for the number of atoms of impurities per unit volume in the direction from the second main surface toward the first main surface of the second semiconductor layer.

17. The semiconductor device according to claim 14 , wherein, of the plurality of peaks in the buffer layer, a maximum peak is lower than a peak for the number of atoms of impurities per unit volume in the direction from the second main surface toward the first main surface of the first semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2021
From: NAKAMURA, KATSUMI
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 058269/0604 →
Priority Claims (1)
JP 2021-036331 · Mar 8, 2021 · national
Continuity (1)
Related Publication 20220285537A1 · Sep 8, 2022