Circuit board and method of manufacturing the same
A circuit board according to an embodiment includes an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes a copper foil layer disposed on the insulating layer, a first plating layer disposed on the copper foil layer, and a second plating layer disposed on the first plating layer, and wherein the copper foil layer has a thickness in a range of 2 μm to 5 μm.
1. A circuit board comprising:
an insulating layer;
a circuit pattern disposed on the insulating layer; and
a via disposed in a via hole passing through the insulating layer,
wherein the circuit pattern includes:
a copper foil layer disposed on the insulating layer,
a first plating layer disposed on the copper foil layer, and
a second plating layer disposed on the first plating layer, and
wherein the insulating layer includes a resin and a filler in the resin, and
wherein a recess is provided at an inner wall of the via hole and has a shape corresponding to the filler.
2. The circuit board of claim 1 , wherein the insulating layer and the copper foil layer are a resin coated copper (RCC).
3. The circuit board of claim 1 , the copper foil layer has a 10-point average roughness (Rz) in a range of 1.5 μm to 3.0 μm.
4. The circuit board of claim 1 , the first plating layer has a thickness in a range of 1 μm to 2.5 μm.
5. The circuit board of claim 1 , wherein the second plating layer has a thickness in a range of 10 μm to 25 μm.
6. The circuit board of claim 1 ,
wherein the via contacts the resin and does not contact the filler.
7. The circuit board of claim 1 , wherein a thickness of the copper foil layer is different from a thickness of the first plating layer.
8. The circuit board of claim 1 , wherein the recess has a depth in a range of 0.5 μm to 1.0 μm.
9. The circuit board of claim 7 ,
wherein the recess has a width corresponding to a diameter of the filler.
10. The circuit board of claim 9 , wherein the diameter of the filler has a range of 0.5 μm to 1.0 μm.
11. The circuit board of claim 9 , wherein an area of the recess is 3% to 10% of a total area of inner wall of the via hole.
12. The circuit board of claim 11 , wherein the inner wall of the via hole has a surface roughness (Ra) in a range of 0.5 μm to 1.0 μm,
wherein the via has a surface roughness corresponding to the inner wall of the via hole.
13. The circuit board of claim 1 , wherein the via comprises:
a first via layer corresponding to the first plating layer; and
a second via layer corresponding to the second plating layer.
14. The circuit board of claim 7 , wherein the thickness of the copper foil layer is greater than the thickness of the first plating layer.
15. The circuit board of claim 7 , wherein the thickness of the copper foil layer has a range of 2 μm to 5 μm.
16. The circuit board of claim 1 , wherein the via includes a convex portion disposed in the recess of the via hole.