IP Library Granted Patent US 11,841,753
Granted Patent B2
US 11,841,753 · App. 17/466,499 · Granted Dec 12, 2023

Operating temperature management of a memory sub-system

Inventors: Shane Nowell (Boise, ID); Sivagnanam Parthasarathy (Carlsbad, CA)
G06F1/206G01K3/005G06F1/203G11C11/5635
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Quick Facts
Patent No.
US 11,841,753
App. No.
17/466,499
Granted
Dec 12, 2023
Kind
B2
Abstract

An operating temperature of a memory sub-system is identified. It is determined whether the operating temperature satisfies a first temperature condition associated with a threshold temperature. Upon determining that the operating temperature satisfies the first temperature condition, one or more operations are performed on at least one data block at a memory component of the memory sub-system until the operating temperature changes to satisfy a second temperature condition associated with the threshold temperature. The one or more operations are selected to be performed based on a difference between the operating temperature and the threshold temperature.

Claims (36)

1. A system comprising:

a memory sub-system; and

a processing device, operatively coupled with the memory component, to:

identify that an operating temperature of the memory sub-system is outside of a temperature range by being one of: below a first threshold temperature defining a lower end of the temperature range, or above a second threshold temperature defining an upper end of the temperature range; and

perform one or more operations on at least one data block until the operating temperature is inside the temperature range, wherein the one or more operations are selected to be performed based on a difference between the operating temperature and one of: the first threshold temperature or the second threshold temperature.

2. The system of claim 1 , wherein, to perform the one or more operations on the at least one data block, the processing device is to perform one or more of:

a read operation;

a write operation; or

an erase operation.

3. The system of claim 1 , wherein the at least one data block is comprised within a memory component of the memory subsystem, and wherein, to perform the one or more operations on the at least one data block, the processing device is to:

perform an operation associated with a temperature control element that is proximate to the memory component of the memory sub-system.

4. The system of claim 1 , further comprising:

a temperature sensor to detect the operating temperature; and

a temperature comparator to perform a temperature comparison operation between two or more temperature values to determine whether the operating temperature is outside of the temperature range.

5. A method comprising:

identifying, by a processing device, that an operating temperature of a memory sub-system is outside of a temperature range by being one of: below a first threshold temperature defining a lower end of the temperature range, or above a second threshold temperature defining an upper end of the temperature range; and

performing, by the processing device, one or more operations on at least one data block until the operating temperature is inside the temperature range, wherein the one or more operations are selected to be performed based on a difference between the operating temperature and one of: the first threshold temperature or the second threshold temperature.

6. The method of claim 5 , wherein performing the one or more operations on the data block comprises performing one or more of:

a read operation;

a write operation; or

an erase operation.

7. The method of claim 5 , further comprising:

causing, by the processing device, a temperature sensor to detect the operating temperature; and

causing, by the processing device, a temperature comparator to perform a temperature comparison operation between two or more temperature values to determine whether the operating temperature is outside of the temperature range.

8. The method of claim 5 , wherein the at least one data block is comprised within a memory component of the memory subsystem, and wherein performing the one or more operations on the at least one data block further comprises performing an operation associated with a temperature control element that is proximate to the memory component of the memory sub-system.

9. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

identify that an operating temperature of a memory sub-system is outside of a temperature range by being one of: below a first threshold temperature defining a lower end of the temperature range, or above a second threshold temperature defining an upper end of the temperature range;

cause one or more operations to be performed on at least one data block until the operating temperature is inside the temperature range, wherein the one or more operations are selected to be performed based on a difference between the operating temperature and one of: the first threshold temperature or the second threshold temperature.

10. The non-transitory computer-readable storage medium of claim 9 , wherein the at least one data block is comprised within a memory component of the memory subsystem, and wherein, to cause the one or more operations to be performed on the at least one data block, the processing device is to activate a temperature control element that is proximate to the memory component.

11. The non-transitory computer-readable storage medium of claim 9 , wherein the one or more operations comprise one or more of:

a read operation;

a write operation; or

an erase operation.

12. The non-transitory computer-readable storage medium of claim 9 , wherein the processing device is further to:

cause a temperature sensor to detect the operating temperature; and

cause a temperature comparator to perform a temperature comparison operation between two or more temperature values to determine whether the operating temperature is outside of the temperature range.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2023
From: MICRON TECHNOLOGY, INC.
To: LODESTAR LICENSING GROUP LLC
Reel/Frame 065514/0068 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2021
From: NOWELL, SHANE; PARTHASARATHY, SIVAGNANAM
To: MICRON TECHNOLOGY, INC.
Reel/Frame 057384/0007 →
Continuity (2)
Continuation 16123189 · Sep 6, 2018
Related Publication 20210397233A1 · Dec 23, 2021