Managing write disturb for units of memory in a memory sub-system
Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include, determining that a value of a write counter associated with the memory device satisfies a first threshold criterion. The operations performed by the processing device further include, responsive to determining that the value of the write counter satisfies the first threshold criterion, identifying a first memory unit and a second memory unit of the memory device, the second memory unit comprising one or more memory cells adjacent to one or more memory cells of the first memory unit. The operations performed by the processing device further include performing a read operation on the second memory unit to determine a set of failed bit count statistics corresponding to a plurality of codewords of the second memory unit. The operations performed by the processing device further include determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies a second threshold criterion. The operations performed by the processing device further include, responsive to determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion, performing a write scrub operation on the second memory unit.
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
determining that a value of a write counter associated with the memory device satisfies a first threshold criterion, wherein the write counter is a global counter indicating a number of write operations to the memory device;
responsive to determining that the value of the write counter satisfies the first threshold criterion, identifying a first memory unit and a second memory unit of the memory device, the second memory unit comprising one or more memory cells adjacent to one or more memory cells of the first memory unit;
performing a read operation on the second memory unit to determine a set of failed bit count statistics corresponding to a plurality of codewords of the second memory unit;
determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies a second threshold criterion; and
responsive to determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion, performing a write scrub operation on the second memory unit.
2. The system of claim 1 , further comprising:
resetting the value of the write counter to an initial value.
3. The system of claim 1 , further comprising:
performing a write operation on the first memory unit of the memory device; and
responsive to performing the write operation on the first memory unit, incrementing the value of the write counter.
4. The system of claim 1 , wherein determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion comprises:
determining a failed bit count corresponding to each codeword of the plurality of codewords, wherein the failed bit count indicates a number of bit flips;
identifying a codeword of the plurality of codewords with a maximum failed bit count; and
determining that the codeword with the maximum failed bit count satisfies the second threshold criterion.
5. The system of claim 1 , wherein determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion comprises:
determining a total number of failed bit counts corresponding to the plurality of codewords, wherein the total number of failed bit counts indicates a number of bit flips;
calculating an average number of failed bit counts based on the total number of failed bit counts; and
determining that the average number of failed bit counts satisfies the second threshold criterion.
6. The system of claim 1 , wherein determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion comprises:
determining a failed bit count corresponding to each codeword of the plurality of codewords, wherein the failed bit count indicates a number of bit flips;
determining that the failed bit count is greater than a threshold number of failed bit counts; and
determining that the codeword associated with the failed bit count satisfies the second threshold.
7. The system of claim 1 , wherein performing the write scrub operation on the second memory unit comprises:
performing an error correction operation on data from the second memory unit; and
writing the data back to the second memory unit.
8. A method comprising:
generating a pseudo-random number associated with a memory device;
determining that a value of the pseudo-random number satisfies a first threshold criterion;
responsive to determining that the value of the pseudo-random number satisfies the first threshold criterion, identifying a first memory unit and a second memory unit of the memory device, the second memory unit comprising one or more memory cells adjacent to one or more memory cells of the first memory unit;
performing a read operation on the second memory unit to determine a set of failed bit count statistics corresponding to a plurality of codewords of the second memory unit;
determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies a second threshold criterion; and
responsive to determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion, performing a write scrub operation on the second memory unit.
9. The method of claim 8 , further comprising:
performing a write operation on the first memory unit of the memory device; and
responsive to performing the write operation on the first memory unit, generating the pseudo-random number.
10. The method of claim 8 , wherein determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion comprises:
determining a failed bit count corresponding to each codeword of the plurality of codewords, wherein the failed bit count indicates a number of bit flips;
identifying a codeword of the plurality of codewords with a maximum failed bit count; and
determining that the codeword with the maximum failed bit count satisfies the second threshold criterion.
11. The method of claim 8 , wherein determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion comprises:
determining a total number of failed bit counts corresponding to the plurality of codewords, wherein the total number of failed bit counts indicates a number of bit flips;
calculating an average number of failed bit counts based on the total number of failed bit counts; and
determining that the average number of failed bit counts satisfies the second threshold criterion.
12. The method of claim 8 , wherein determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion comprises:
determining a failed bit count corresponding to each codeword of the plurality of codewords, wherein the failed bit count indicates a number of bit flips;
determining that the failed bit count is greater than a threshold number of failed bit counts; and
determining that the codeword associated with the failed bit count satisfies the second threshold.
13. The method of claim 8 , wherein performing the write scrub operation on the second memory unit comprises:
performing an error correction operation on data from the second memory unit; and
writing the data back to the second memory unit.
14. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
determining that a value of a write counter associated with a memory device satisfies a first threshold criterion, wherein the write counter is a global counter indicating a number of write operations to the memory device;
responsive to determining that the value of the write counter satisfies the first threshold criterion, identifying a first memory unit and a second memory unit of the memory device, the second memory unit comprising one or more memory cells adjacent to one or more memory cells of the first memory unit;
performing a read operation on the second memory unit to determine a set of failed bit count statistics corresponding to a plurality of codewords of the second memory unit;
determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies a second threshold criterion; and
responsive to determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion, performing a write scrub operation on the second memory unit.
15. The non-transitory computer-readable storage medium of claim 14 , wherein the processing device is to perform operations further comprising:
resetting the value of the write counter to an initial value.
16. The non-transitory computer-readable storage medium of claim 14 , wherein the processing device is to perform operations further comprising:
performing a write operation on the first memory unit of the memory device; and
responsive to performing the write operation on the first memory unit, incrementing the value of the write counter.
17. The non-transitory computer-readable storage medium of claim 14 , wherein determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion comprises:
determining a failed bit count corresponding to each codeword of the plurality of codewords, wherein the failed bit count indicates a number of bit flips;
identifying a codeword of the plurality of codewords with a maximum failed bit count; and
determining that the codeword with the maximum failed bit count satisfies the second threshold criterion.
18. The non-transitory computer-readable storage medium of claim 14 , wherein determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion comprises:
determining a total number of failed bit counts corresponding to the plurality of codewords, wherein the total number of failed bit counts indicates a number of bit flips;
calculating an average number of failed bit counts based on the total number of failed bit counts; and
determining that the average number of failed bit counts satisfies the second threshold criterion.
19. The non-transitory computer-readable storage medium of claim 14 , wherein determining that the set of failed bit count statistics corresponding to the plurality of codewords of the second memory unit satisfies the second threshold criterion comprises:
determining a failed bit count corresponding to each codeword of the plurality of codewords, wherein the failed bit count indicates a number of bit flips;
determining that the failed bit count is greater than a threshold number of failed bit counts; and
determining that the codeword associated with the failed bit count satisfies the second threshold.
20. The non-transitory computer-readable storage medium of claim 14 , wherein performing the write scrub operation on the second memory unit comprises:
performing an error correction operation on data from the second memory unit; and
writing the data back to the second memory unit.