IP Library › Granted Patent US 11,977,614
Granted Patent B2
US 11,977,614 · App. 17/479,623 · Granted May 7, 2024

Circuit design watermarking

Inventors: Carl Radens (LaGrangeville, NY); Lawrence A. Clevenger (Saratoga Springs, NY); Daniel James Dechene (Albany, NY); Hsueh-Chung Chen (Cohoes, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G06F21/16G06F30/00G06F30/20G06F30/30H05K3/00
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Quick Facts
Patent No.
US 11,977,614
App. No.
17/479,623
Granted
May 7, 2024
Kind
B2
Abstract

Methods and systems for watermarking a circuit design include defining a watermarked cell library that includes cells, each of which defines a design structure that corresponds to a manufacturable physical structure, at least one of which being a watermarked call that includes a watermark. The watermark is encoded using a design structure that extends beyond a respective cell boundary. A first circuit design file is generated for a device to be manufactured. The first circuit design file including at least one watermarked cell. The first circuit design file is sent to a manufacturer for fabrication of a corresponding device that includes a watermark structure that encodes an identifier.

Claims (31)

1. A method of watermarking a circuit design, comprising:

defining a watermarked cell library that includes a plurality of cells, each of which defines a design structure that corresponds to a manufacturable physical structure, at least one of which being a watermarked call that includes a watermark, the watermark being encoded using a design structure that extends beyond a respective cell boundary;

generating a first circuit design file for a device to be manufactured, the first circuit design file including at least one watermarked cell; and

sending the first circuit design file to a manufacturer for fabrication of a corresponding device that includes a watermark structure that encodes an identifier.

2. The method of claim 1 , wherein generating the first circuit design file includes a computer aided design process that accesses cells from the watermarked cell library, including the watermarked cell.

3. The method of claim 2 , wherein defining the watermarked cell library includes generating a plurality of watermarked cells in the design library that correspond to an original cell, each watermarked cell having a different encoded identifier.

4. The method of claim 3 , further comprising generating a second circuit design file for the device to be manufactured, the second design file including at least one watermarked cell that has a different encoded identifier than the identifier encoded by the at least one watermark of the first design file.

5. The method of claim 2 , wherein generating the first circuit design file includes placing multiple watermarked cells next to one another, including a first watermarked cell with a structure that extends into a cell boundary of a second watermarked cell and that overlaps with a structure of the second watermarked cell.

6. The method of claim 1 , wherein the structure that extends beyond a respective cell boundary extends into a whitespace portion of the circuit design file.

7. The method of claim 1 , wherein the structure that extends beyond a respective cell boundary includes a structure that is removed during fabrication.

8. The method of claim 1 , wherein the structure that extends beyond the respective cell boundary includes a structure that is preserved through fabrication to remain in a finished device.

9. The method of claim 8 , wherein the structure that extends beyond the respective cell boundary includes a sacrificial structure that is covered by a protective structure.

10. The method of claim 1 , further comprising sending the watermarked design library to the manufacturer.

11. A computer program product for watermarking a circuit design, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions being executable by a hardware processor to cause the hardware processor to:

define a watermarked cell library that includes a plurality of cells, each of which defines a design structure that corresponds to a manufacturable physical structure, at least one of which being a watermarked call that includes a watermark, the watermark being encoded using a design structure that extends beyond a respective cell boundary;

generate a first circuit design file for a device to be manufactured, the first circuit design file including at least one watermarked cell; and

send the first circuit design file to a manufacturer for fabrication of a corresponding device that includes a watermark structure that encodes an identifier.

12. A system for watermarking a circuit design, comprising:

a hardware processor; and

a memory that stores a computer program, which, when executed by the hardware processor, causes the hardware processor to:

define a watermarked cell library that includes a plurality of cells, each of which defines a design structure that corresponds to a manufacturable physical structure, at least one of which being a watermarked call that includes a watermark, the watermark being encoded using a design structure that extends beyond a respective cell boundary;

generate a first circuit design file for a device to be manufactured, the first circuit design file including at least one watermarked cell; and

send the first circuit design file to a manufacturer for fabrication of a corresponding device that includes a watermark structure that encodes an identifier.

13. The system of claim 12 , wherein the computer program further causes the hardware processor to use a computer aided design process that accesses cells from the watermarked cell library, including the watermarked cell.

14. The system of claim 13 , wherein the computer program further causes the hardware processor to generate a plurality of watermarked cells in the design library that correspond to an original cell, each watermarked cell having a different encoded identifier.

15. The system of claim 14 , wherein the computer program further causes the hardware processor to generate a second circuit design file for the device to be manufactured, the second design file including at least one watermarked cell that has a different encoded identifier than the identifier encoded by the at least one watermark of the first design file.

16. The system of claim 13 , wherein the computer program further causes the hardware processor to place multiple watermarked cells next to one another, including a first watermarked cell with a structure that extends into a cell boundary of a second watermarked cell and that overlaps with a structure of the second watermarked cell.

17. The system of claim 12 , wherein the structure that extends beyond a respective cell boundary extends into a whitespace portion of the circuit design file.

18. The system of claim 12 , wherein the structure that extends beyond a respective cell boundary includes a structure that is removed during fabrication.

19. The system of claim 12 , wherein the structure that extends beyond the respective cell boundary includes a structure that is preserved through fabrication to remain in a finished device.

20. The system of claim 19 , wherein the structure that extends beyond the respective cell boundary includes a sacrificial structure that is covered by a protective structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2021
From: RADENS, CARL; CLEVENGER, LAWRENCE A.; DECHENE, DANIEL JAMES; CHEN, HSUEH-CHUNG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 057534/0487 →
Continuity (1)
Related Publication 20230090521A1 · Mar 23, 2023