IP Library Granted Patent US 11,809,342
Granted Patent B2
US 11,809,342 · App. 17/482,412 · Granted Nov 7, 2023

Universal mechanism to access and control a computational device

Inventors: Ramzi Ammari (Santa Clara, CA); Changho Choi (San Jose, CA)
G06F13/1668
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Quick Facts
Patent No.
US 11,809,342
App. No.
17/482,412
Granted
Nov 7, 2023
Kind
B2
Abstract

A storage device is disclosed. The storage device may include a storage for a data and a controller to process an input/output (I/O) request from a host processor on the data in the storage. A computational storage unit may implement at least one service for execution on the data in the storage. A command router may route a command received from the host processor to the controller or the computational storage unit based at least in part on the command.

Claims (38)

1. A storage device, comprising:

a storage for a data;

a controller to process an input/output (I/O) request from a host processor on the data in the storage;

a computational storage unit to implement at least one service for execution on the data in the storage; and

a command router to route a first storage protocol command received from the host processor to the controller and to route a second storage protocol command received from the host processor to the computational storage unit based at least in part on a feature identifier of the second storage protocol command.

2. A method, comprising:

receiving a first storage protocol command from a host processor at a command router;

identifying a controller of a storage device based at least in part on the first storage protocol command;

routing the first storage protocol command to the controller;

receiving a second storage protocol command from the host processor at the command router;

identifying a computational storage unit of a storage device based at least in part on a feature identifier of the second storage protocol command;

routing the second storage protocol command to the computational storage unit,

wherein the controller is.

3. An article, comprising a non-transitory storage medium, the non-transitory storage medium having stored thereon instructions that, when executed by a machine, result in:

receiving a first storage protocol command from a host processor at a command router;

identifying a controller of a storage device based at least in part on the first storage protocol command;

routing the first storage protocol command to the controller;

receiving a second storage protocol command from the host processor at the command router;

identifying a computational storage unit of a storage device based at least in part on a feature identifier of the second storage protocol command;

routing the second storage protocol command to the computational storage unit,

wherein the controller is.

4. The storage device according to claim 1 , wherein the storage device includes a Solid State Drive (SSD).

5. The storage device according to claim 1 , wherein the command router is configured to route the first storage protocol command to the controller based at least in part on the first storage protocol command including a storage device command identifier.

6. The storage device according to claim 1 , wherein the command router is configured to route the second storage protocol command to the computational storage unit based at least in part on the feature identifier of the second storage protocol command including a computational storage unit command identifier.

7. The storage device according to claim 1 , wherein the second storage protocol command includes at least two services of the computational storage unit.

8. The storage device according to claim 1 , wherein the command router includes a list of storage device command identifiers to be routed to the controller.

9. The storage device according to claim 1 , wherein the computational storage unit includes at least two cores.

10. The storage device according to claim 1 , wherein the controller is separate from the command router.

11. The storage device according to claim 1 , wherein the second storage protocol command includes a trace command.

12. The storage device according to claim 1 , wherein the feature identifier includes the feature identifier of a storage protocol.

13. The method according to claim 2 , wherein the second storage protocol command includes at least one of a Non-Volatile Memory Express (NVMe) command, Compute Express Link (CXL) command, or a Peripheral Component Interconnect Express (PCIe) command.

14. The method according to claim 2 , wherein the second storage protocol command includes at least two services of the computational storage unit.

15. The method according to claim 2 , wherein identifying the controller of the storage device based at least in part on the first storage protocol command includes determining, at the command router, that the first storage protocol command identifier is in a list of command identifiers to be routed to the storage device.

16. The method according to claim 2 , wherein identifying the computational storage unit based at least in part on the feature identifier of the second storage command includes determining, at the command router, that the feature identifier is in a list of feature identifiers to be routed to the computational storage unit.

17. The method according to claim 2 , wherein the computational storage unit includes at least two cores.

18. The article according to claim 3 , wherein the second storage protocol command includes at least two services of the computational storage unit.

19. The article according to claim 3 , wherein identifying the controller of the storage device based at least in part on the first storage protocol command includes determining, at the command router, that the first storage protocol command identifier is in a list of command identifiers to be routed to the storage device.

20. The storage device according to claim 12 , wherein the second storage protocol command includes at least one of a Non-Volatile Memory Express (NVMe) command, Compute Express Link (CXL) command, or a Peripheral Component Interconnect Express (PCIe) command.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2023
From: AMMARI, RAMZI; CHOI, CHANGHO
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 064364/0189 →
Continuity (2)
Provisional Application 63223544 · Jul 19, 2021
Related Publication 20230024949A1 · Jan 26, 2023