Out-of-order execution of graphics processing unit texture sampler operations
Embodiments described herein are generally directed facilitating out-of-order execution of GPU texture sampler operations. An embodiment of a method includes a texture sampler of a GPU maintaining (i) a latency queue operable to store information regarding a set of transactions associated with each of multiple texture sampler operations and (ii) multiple virtual channel (VC) queues each operable to store information regarding transactions for a respective single texture sampler operation at a time. Out-of-order processing of the texture sampler operations is facilitated by making use of the latency queue and the VC queues. For example, during a transaction processing interval, the availability of data in a cache for the transactions associated with each of the VC queues may be determined. A VC queue may be selected based on the determined availability of data. A transaction associated with a head of the selected VC queue may then be processed.
1. A graphics processing unit (GPU) comprising:
a level 1 (L1) cache; and
a texture sampler, coupled to the L1 cache, including (i) a latency queue operable to store information regarding a set of transactions associated with each of a plurality of texture sampler operations and (ii) a plurality of virtual channel (VC) queues each operable to store information regarding transactions for a respective single texture sampler operation at a time, wherein the texture sampler is operable to, during a transaction processing interval, facilitate out-of-order processing of the plurality of texture sampler operations by:
determining availability of data in the L1 cache associated with the texture sampler for the transactions associated with each of the plurality of VC queues;
selecting a VC queue of the plurality of VC queues based on the determined availability of data including prioritizing a particular VC queue of the plurality of VC queues containing information regarding transactions representing all transactions for the respective single texture sampler operation over another VC queue of the plurality of VC queues containing information regarding transactions representing less than all transactions for the respective single texture sampler operation; and
processing a transaction associated with a head of the selected VC queue.
2. The GPU of claim 1 , wherein the texture sampler is further operable to:
dequeue information regarding a transaction associated with a head of the latency queue that is part of the set of transactions associated with a particular texture sampler operation of the plurality of texture sampler operations; and
enqueue the information regarding the transaction at a tail of a VC queue of the plurality of VC queues currently storing information regarding transactions associated with the particular texture sampler operation.
3. The GPU of claim 1 , wherein the texture sampler is further operable to continue to process subsequent transactions associated with the head of the selected VC queue until all of the transactions for the respective single texture sampler operation have been completed.
4. The GPU of claim 1 , wherein said selecting a VC queue of the plurality of VC queues based on the determined availability of data includes determining data is available in the L1 cache for at least a threshold number of the transactions associated with the selected VC queue.
5. The GPU of claim 4 , wherein the threshold number is 8.
6. The GPU of claim 1 , wherein the plurality of VC queues comprises 8 VC queues per 32 threads.
7. The GPU of claim 1 , wherein each of the plurality of VC queues includes 16 entries.
8. A method comprising:
maintaining within a texture sampler of a graphics processing unit (i) a latency queue operable to store information regarding a set of transactions associated with each of a plurality of texture sampler operations and (ii) a plurality of virtual channel (VC) queues each operable to store information regarding transactions for a respective single texture sampler operation at a time;
during a transaction processing interval, facilitating out-of-order processing of the plurality of texture sampler operations by:
determining availability of data in a cache associated with the texture sampler for the transactions associated with each of the plurality of VC queues;
selecting a VC queue of the plurality of VC queues based on the determined availability of data including prioritizing a particular VC queue of the plurality of VC queues containing information regarding transactions representing all transactions for the respective single texture sampler operation over another VC queue of the plurality of VC queues containing information regarding transactions representing less than all transactions for the respective single texture sampler operation; and
processing a transaction associated with a head of the selected VC queue.
9. The method of claim 8 , further comprising during the transaction processing interval:
dequeuing information regarding a transaction associated with a head of the latency queue that is part of the set of transactions associated with a particular texture sampler operation of the plurality of texture sampler operations; and
enqueuing the information regarding the transaction at a tail of a VC queue of the plurality of VC queues currently storing information regarding transactions associated with the particular texture sampler operation.
10. The method of claim 8 , further comprising continuing to process subsequent transactions associated with the head of the selected VC queue until all of the transactions for the respective single texture sampler operation have been completed.
11. The method of claim 8 , wherein said selecting a VC queue of the plurality of VC queues based on the determined availability of data includes determining data is available in the cache for at least a threshold number of the transactions associated with the selected VC queue.
12. The method of claim 11 , wherein the threshold number is 8.
13. The method of claim 8 , wherein the plurality of VC queues comprises 8 VC queues per 32 threads.
14. The method of claim 8 , wherein each of the plurality of VC queues includes 16 entries.
15. A texture sampler of a graphics processing unit, the texture sampler comprising:
a latency queue operable to store information regarding a set of transactions associated with each of a plurality of texture sampler operations; and
a plurality of virtual channel (VC) queues each operable to store information regarding transactions for a respective single texture sampler operation at a time, wherein the texture sampler is operable to, during a transaction processing interval, facilitate out-of-order processing of the plurality of texture sampler operations by:
determining availability of data in a level 1 (L1) cache associated with the texture sampler for the transactions associated with each of the plurality of VC queues;
selecting a VC queue of the plurality of VC queues based on the determined availability of data including prioritizing a particular VC queue of the plurality of VC queues containing information regarding transactions representing all transactions for the respective single texture sampler operation over another VC queue of the plurality of VC queues containing information regarding transactions representing less than all transactions for the respective single texture sampler operation; and
processing a transaction associated with a head of the selected VC queue.
16. The texture sampler of claim 15 , wherein the texture sampler is further operable to:
dequeue information regarding a transaction associated with a head of the latency queue that is part of the set of transactions associated with a particular texture sampler operation of the plurality of texture sampler operations; and
enqueue the information regarding the transaction at a tail of a VC queue of the plurality of VC queues currently storing information regarding transactions associated with the particular texture sampler operation.
17. The texture sampler of claim 15 , wherein the texture sampler is further operable to continue to process subsequent transactions associated with the head of the selected VC queue until all of the transactions for the respective single texture sampler operation have been completed.
18. The texture sampler of claim 15 , wherein said selecting a VC queue of the plurality of VC queues based on the determined availability of data includes determining data is available in the L1 cache for at least a threshold number of the transactions associated with the selected VC queue.
19. The texture sampler of claim 18 , wherein the threshold number is 8.
20. The texture sampler of claim 15 , wherein the plurality of VC queues comprises 8 VC queues per 32 threads.
21. The texture sampler of claim 15 , wherein each of the plurality of VC queues includes 16 entries.