Electrostatic discharge diode having dielectric isolation layer
In one embodiment a semiconductor structure comprises a semiconductor substrate, a trench dielectric layer disposed in a trench of the semiconductor substrate, a first source/drain region disposed in contact with the semiconductor substrate, a gate and a second source/drain region. The gate is disposed between the first source/drain region and the second source/drain region. The semiconductor structure further comprises a dielectric isolation layer disposed between the semiconductor substrate and the second source/drain region.
1. A semiconductor structure, comprising:
a semiconductor substrate;
a trench dielectric layer disposed in a trench of the semiconductor substrate;
an inter-layer dielectric layer disposed on and in contact with the trench dielectric layer;
a first source/drain region of a first conductivity type disposed in contact with the semiconductor substrate;
a gate;
a second source/drain region of a second conductivity type opposite to the first conductivity type, the gate being disposed between the first source/drain region and the second source/drain region;
a first dielectric isolation layer disposed on the semiconductor substrate between a portion having the first conductivity type of the first source/drain region and the trench dielectric layer, and disposed adjacent to and contacting a top surface of a first side of the trench dielectric layer and a bottom surface and a first side surface of the inter-layer dielectric layer; and
a second dielectric isolation layer disposed on the semiconductor substrate between a portion having the second conductivity type of the second source/drain region and the trench dielectric layer, and disposed adjacent to and contacting the top surface of a second side of the trench dielectric layer and the bottom surface and a second side surface opposite to the first side surface of the inter-layer dielectric layer.
2. The semiconductor structure of claim 1 , wherein the first and second dielectric isolation layers are disposed on the semiconductor substrate adjacent the trench dielectric layer.
3. The semiconductor structure of claim 1 , further comprising a first plurality of gates disposed on the semiconductor substrate on the first side of the trench dielectric layer and a second plurality of gates disposed on the semiconductor substrate on the second side of the trench dielectric layer.
4. The semiconductor structure of claim 3 , wherein the first source/drain region corresponds to the first plurality of gates and the second source/drain region corresponds to the second plurality of gates and wherein the first and second source/drain regions and the trench dielectric layer together comprise a diode junction.
5. A semiconductor structure, comprising:
a first plurality of gates disposed on a semiconductor substrate on a first side of a trench dielectric layer disposed in a trench of the semiconductor substrate;
an inter-layer dielectric layer disposed on and in contact with the trench dielectric layer;
a first plurality of source/drain regions of a first conductivity type disposed between the first plurality of gates and in contact with the semiconductor substrate;
a second plurality of gates disposed on the semiconductor substrate on a second side of the trench dielectric layer;
a second plurality of source/drain regions of a second conductivity type opposite to the first conductivity type disposed between the second plurality of gates and in contact with the semiconductor substrate;
a first dielectric isolation layer disposed on the semiconductor substrate between a portion having the first conductivity type of the first plurality of source/drain regions and the trench dielectric layer, and disposed adjacent to and contacting a top surface of the first side of the trench dielectric layer and a bottom surface and a first side surface of the inter-layer dielectric layer; and
a second dielectric isolation layer disposed on the semiconductor substrate between a portion having the second conductivity type of the second plurality of source/drain regions and the trench dielectric layer, and disposed adjacent to and contacting the top surface of the second side of the trench dielectric layer and the bottom surface and a second side surface opposite to the first side surface of the inter-layer dielectric layer;
wherein the first plurality of source/drain regions, the second plurality of source/drain regions, the first and second dielectric isolation layers and the trench dielectric layer together form a diode junction.
6. The semiconductor structure of claim 5 , wherein the first and second dielectric isolation layers are disposed on the semiconductor substrate adjacent the trench dielectric layer.
7. The semiconductor structure of claim 5 , further comprising a first source/drain region disposed on the first dielectric isolation layer, the first source/drain region being isolated from the diode junction of the first plurality of source/drain regions, the second plurality of source/drain regions, the first and second dielectric isolation layers and the trench dielectric layer.
8. The semiconductor structure of claim 7 , wherein the first conductivity type comprises one of a p-type and an n-type epitaxy and the second conductivity type comprises the other of the p-type and n-type epitaxy.