Hard mask removal without damaging top epitaxial layer
Embodiments disclosed herein describe methods of forming semiconductor devices. The methods may include etching vias and trenches in a middle-of-line (MOL) layer that has a low-k dielectric layer, a sacrificial nitride layer, and a hard mask layer. The methods may also include depositing a thin nitride layer within the via trench, depositing a carbon layer on the thin nitride layer within the vias and trenches, etching back the thin nitride layer to expose a portion of the hard mask layer, removing the hard mask layer and the carbon layer, and removing the thin nitride layer and the sacrificial nitride layer.
1. A method, comprising:
etching vias and trenches in a middle-of-line (MOL) layer comprising a low-k dielectric layer, a sacrificial nitride layer, and a hard mask layer;
depositing a thin nitride layer within the vias and trenches;
depositing a carbon layer on the thin nitride layer within the vias and trenches;
etching back a top horizontal portion of the thin nitride layer to expose a portion of the hard mask layer, wherein the carbon layer protects a bottom horizontal portion of the thin nitride layer;
removing the hard mask layer while the carbon layer and the thin nitride layer protect the low-k dielectric layer and a top source/drain contact, wherein the thin nitride layer forms vertical portions above the sacrificial nitride layer;
removing the carbon layer; and
removing the thin nitride layer and the sacrificial nitride layer.
2. The method of claim 1 , wherein depositing the thin nitride layer comprises atomic layer deposition.
3. The method of claim 1 , wherein the thin nitride layer contacts a source/drain contact material.
4. The method of claim 1 , wherein depositing the carbon layer comprises:
filling the trench to a level above the MOL layer;
planarizing the carbon layer; and
recessing the carbon layer to expose the thin nitride layer.
5. The method of claim 1 , further comprising metallizing the via trench.
6. The method of claim 1 , wherein removing the thin nitride layer and the sacrificial nitride layer comprises a wet etch step.
7. The method of claim 1 , wherein the carbon layer protects a bottom horizontal portion of the thin nitride layer during the etching back of the thin nitride layer.
8. A method for removing a hard mask from a semiconductor device, comprising:
etching vias and trenches in a middle-of-line (MOL) layer, wherein the vias and trenches comprise a bottom horizontal portion, vertical portions, and a top horizontal portion;
depositing a thin nitride layer on the bottom horizontal portion, the vertical portions and the top horizontal portion;
depositing a carbon layer on the first horizontal portion;
etching back the thin nitride layer on the top horizontal portion to expose a hard mask layer, wherein the carbon layer protects a bottom horizontal portion of the thin nitride layer;
removing the hard mask layer to expose a sacrificial nitride layer while the carbon layer and the thin nitride layer protect the low-k dielectric layer and a top source/drain contact, wherein the thin nitride layer forms vertical portions above the sacrificial nitride layer;
removing the carbon layer; and
removing the thin nitride layer and the sacrificial nitride layer.
9. The method of claim 8 , wherein depositing the thin nitride layer comprises atomic layer deposition.
10. The method of claim 8 , wherein the bottom horizontal portion of the thin nitride layer contacts a source/drain contact material.
11. The method of claim 8 , wherein depositing the carbon layer comprises:
filling the trench to a level above the top horizontal portion;
planarizing the carbon layer; and
recessing the carbon layer to expose the top horizontal portion.
12. The method of claim 8 , further comprising metallizing the via trench.
13. The method of claim 8 , wherein removing the thin nitride layer and the sacrificial nitride layer comprises a wet etch step.
14. The method of claim 8 , wherein etching the via trench comprises etching through a source/drain contact to expose a cap liner located between the source/drain contact and a source/drain, and wherein the bottom horizontal portion of the thin nitride layer contacts the cap liner.
15. A method, comprising:
depositing a thin nitride layer within vias and trenches of a middle-of-line (MOL) layer;
depositing a carbon layer on the thin nitride layer within the vias and trenches;
etching back a top horizontal portion of the thin nitride layer to expose a hard mask layer, wherein the carbon layer protects a bottom horizontal portion of the thin nitride layer;
removing the hard mask layer while the carbon layer and the thin nitride layer protect the low-k dielectric layer and a top source/drain contact, wherein the thin nitride layer forms vertical portions above a sacrificial nitride layer;
removing the carbon layer; and
removing the thin nitride layer and the sacrificial nitride layer.
16. The method of claim 15 , wherein depositing the thin nitride layer comprises atomic layer deposition.
17. The method of claim 15 , wherein a bottom horizontal portion of the thin nitride layer contacts a source/drain contact material.
18. The method of claim 15 , wherein depositing the carbon layer comprises:
filling the trench to a level above the top horizontal portion;
planarizing the carbon layer; and
recessing the carbon layer to expose the top horizontal portion.
19. The method of claim 15 , wherein removing the thin nitride layer and the sacrificial nitride layer comprises a wet etch step.
20. The method of claim 15 , wherein etching the vias and trenches comprises etching through a source/drain contact to expose a cap liner located between the source/drain contact and a source/drain, and wherein the bottom horizontal portion of the thin nitride layer contacts the cap liner.