Method for preparing semiconductor device structure with air gap
A method for preparing a semiconductor device structure includes forming a first fin structure and a second fin structure over a semiconductor substrate, forming an isolation structure over the semiconductor substrate, partially removing the first fin structure and the second fin structure to form a recessed portion of the first fin structure and a recessed portion of the second fin structure, epitaxially growing a first source/drain (S/D) structure over the recessed portion of the first fin structure and a second S/D structure over the recessed portion of the second fin structure, partially removing the isolation structure through the first opening to form a second opening, and forming a contact etch stop layer (CESL) over the first S/D structure and the second S/D structure such that an air gap is formed and sealed in the first opening and the second opening.
1. A method for preparing a semiconductor device structure, comprising:
forming a first fin structure and a second fin structure over a semiconductor substrate;
forming an isolation structure over the semiconductor substrate, wherein the first fin structure and the second fin structure protrude from the isolation structure;
partially removing the first fin structure and the second fin structure to form a recessed portion of the first fin structure and a recessed portion of the second fin structure;
epitaxially growing a first source/drain (S/D) structure over the recessed portion of the first fin structure and a second S/D structure over the recessed portion of the second fin structure, wherein the first S/D structure is separated from the second S/D structure by a first opening;
partially removing the isolation structure through the first opening to form a second opening; and
forming a contact etch stop layer (CESL) over the first S/D structure and the second S/D structure such that an air gap is formed and sealed in the first opening and the second opening.
2. The method for preparing a semiconductor device structure of claim 1 , wherein a top surface and a sidewall of the recessed portion of the first fin structure protrude from the isolation structure before the first S/D structure is epitaxially grown.
3. The method for preparing a semiconductor device structure of claim 1 , wherein a width of the first opening increases from a top portion of the first opening to a bottom portion of the first opening, and a width of the second opening decreases from a top portion of the second opening to a bottom portion of the second opening.
4. The method for preparing a semiconductor device structure of claim 1 , wherein a sidewall of the isolation structure is exposed in the second opening.
5. The method for preparing a semiconductor device structure of claim 4 , wherein the CESL extends into the first opening and the second opening, and the sidewall of the isolation structure is covered by the CESL.
6. The method for preparing a semiconductor device structure of claim 1 , further comprising:
forming a first word line and a second word line across the first fin structure and the second fin structure, wherein the first S/D structure, the second S/D structure, and the air gap are between the first word line and the second word line; and
epitaxially growing a third S/D structure over another recessed portion of the first fin structure, wherein the first word line is between the first S/D structure and the third S/D structure, and the third S/D structure is electrically connected to a deep trench capacitor.
7. The method for preparing a semiconductor device structure of claim 1 , further comprising:
removing a portion of the CESL over the first S/D structure; and
forming a bit line contact over the first S/D structure, wherein the first S/D structure is electrically connected to a bit line through the bit line contact.