Integrated self-aligned assembly
An assembly. In some embodiments, the assembly includes a first semiconductor chip, a substrate, and a first alignment element. The alignment of the first semiconductor chip and the substrate may be determined at least in part by engagement of the first alignment element with a first recessed alignment feature, in a surface of the first semiconductor chip.
1. An assembly, comprising:
a first semiconductor chip;
a substrate; and
a first alignment element,
wherein the alignment of the first semiconductor chip and the substrate is determined at least in part by engagement of the first alignment element with a first recessed alignment feature, in a surface of the first semiconductor chip and extending part way through the first semiconductor chip, and
wherein the first alignment element is a pin elongated along an axis, a first end of the pin being secured in a hole in the substrate, and the axis extending from the substrate to the first semiconductor chip.
2. The assembly of claim 1 , wherein the first recessed alignment feature has a face aligned with a crystalline plane of the first semiconductor chip.
3. The assembly of claim 2 , wherein the first recessed alignment feature has the shape of a pyramid or of a truncated pyramid.
4. The assembly of claim 2 , wherein the first recessed alignment feature has the shape of a V-groove or of a truncated V-groove.
5. The assembly of claim 1 , wherein the elongated pin is a cylindrical pin.
6. The assembly of claim 5 , wherein a second end of the cylindrical pin is hemispherical and engages the first recessed alignment feature.
7. The assembly of claim 6 , wherein the first semiconductor chip is a photonic integrated circuit having an optical interface and an electrical interface, the photonic integrated circuit being configured to convert optical signals to electrical signals or to convert electrical signals to optical signals.
8. The assembly of claim 7 , further comprising an interface integrated circuit connected to the electrical interface of the photonic integrated circuit, and connected, through a land grid array and through a socket, to the substrate.
9. The assembly of claim 7 , wherein the first recessed alignment feature has the shape of a pyramid or of a truncated pyramid.
10. The assembly of claim 7 , wherein the first recessed alignment feature has the shape of a V-groove or of a truncated V-groove.
11. The assembly of claim 6 , further comprising a photonic integrated circuit, wherein:
the photonic integrated circuit has an optical interface and an electrical interface, and is configured to convert optical signals to electrical signals or to convert electrical signals to optical signals.
12. The assembly of claim 11 , comprising an interface integrated circuit connected to the electrical interface of the photonic integrated circuit, and connected, through land grid array and through a socket, to the substrate.
13. The assembly of claim 12 , wherein the first alignment element extends through the socket.
14. The assembly of claim 12 , wherein:
the first semiconductor chip is a carrier; and
the interface integrated circuit and the photonic integrated circuit are secured to the carrier.
15. The assembly of claim 14 , wherein the photonic integrated circuit has an active surface facing the carrier, and
a second alignment element engages:
a second recessed alignment feature, in the photonic integrated circuit, and
a third recessed alignment feature, in the carrier.
16. The assembly of claim 15 , wherein the first recessed alignment feature has the shape of a pyramid or of a truncated pyramid.
17. The assembly of claim 15 , wherein the first recessed alignment feature has the shape of a V-groove or of a truncated V-groove.
18. The assembly of claim 15 , wherein the second recessed alignment feature has the shape of a pyramid or of a truncated pyramid.
19. The assembly of claim 15 , wherein the second recessed alignment feature has the shape of a V-groove or of a truncated V-groove.
20. The assembly of claim 15 , wherein an angle between a sloped surface of the second recessed alignment feature and the active surface is between 50 degrees and 60 degrees.
21. An assembly, comprising:
a first semiconductor chip;
a substrate; and
a first alignment element,
wherein the alignment of the first semiconductor chip and the substrate is determined at least in part by engagement of the first alignment element with a first recessed alignment feature, in a surface of the first semiconductor chip and extending part way through the first semiconductor chip,
wherein the first alignment element is a cylindrical pin extending along an axis and having:
a first end at one end of the axis and that is secured in a hole in the substrate; and
a second end at another end of the axis and that is round and engages the first recessed alignment feature.
22. An assembly, comprising:
a first semiconductor chip;
a substrate; and
a first alignment element,
wherein the alignment of the first semiconductor chip and the substrate is determined at least in part by engagement of the first alignment element with a first recessed alignment feature, in a surface of the first semiconductor chip,
wherein the first alignment element is an elongated pin having a first end secured in a hole in the substrate,
wherein:
the first semiconductor chip is a photonic integrated circuit having an optical interface and an electrical interface, the photonic integrated circuit being configured to convert optical signals to electrical signals or to convert electrical signals to optical signals; or
the assembly further comprises a photonic integrated circuit having an optical interface and an electrical interface, and being configured to convert optical signals to electrical signals or to convert electrical signals to optical signals, and
wherein the assembly further comprises an interface integrated circuit connected to the electrical interface of the photonic integrated circuit, and connected, through a land grid array and through a socket, to the substrate.