IP Library Granted Patent US 11,764,305
Granted Patent B2
US 11,764,305 · App. 17/510,534 · Granted Sep 19, 2023

Semiconductor device

Inventors: Yohei Yamaguchi (Tokyo, JP); Yuichiro Hanyu (Tokyo, JP); Hiroki Hidaka (Tokyo, JP)
Assignee: Japan Display Inc.
H01L29/7869H01L21/02266H01L21/02554H01L27/124H01L27/1225H01L27/1251H01L29/42384H01L29/78648H01L29/78696H10K59/126
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,764,305
App. No.
17/510,534
Granted
Sep 19, 2023
Kind
B2
Abstract

A semiconductor device including a first oxide semiconductor layer, a first gate electrode opposing the first oxide semiconductor layer, a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode, a first insulating layer covering the first oxide semiconductor layer and having a first opening, a first conductive layer above the first insulating layer and in the first opening, the first conductive layer being electrically connected to the first oxide semiconductor layer, and an oxide layer between an upper surface of the first insulating layer and the first conductive layer, wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.

Claims (30)

1. A semiconductor device comprising:

an oxide semiconductor layer;

a gate electrode opposing the oxide semiconductor layer;

a gate insulating layer between the oxide semiconductor layer and the gate electrode;

a first insulating layer covering the oxide semiconductor layer;

an oxide layer;

a first conductive layer above the first insulating layer; and

a first electrode arranged above the oxide semiconductor layer and contacting an upper surface of the oxide semiconductor layer,

wherein

the first conductive layer has a lower surface facing an upper surface of the first insulating layer,

the oxide layer is arranged between the upper surface of the first insulating layer and the first conductive layer, and directly contacting to the upper surface of the first insulating layer and the lower surface of the first conductive layer,

the first insulating layer have a first opening,

the oxide layer has a second opening overlapping the first opening in a plan view,

the first conductive layer is arranged in the first opening and the second opening,

the first conductive layer is electrically connected to the oxide semiconductor layer, and

the first conductive layer directly contacts the first electrode at a bottom part of the first opening.

2. The semiconductor device according to claim 1 , wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.

3. The semiconductor device according to claim 2 , further comprising:

a second conductive layer on an opposite side to the first gate electrode with respect to the oxide semiconductor layer, the second conductive layer overlapping the oxide semiconductor layer in a plan view;

wherein

the first insulating layer is arranged between the oxide semiconductor layer and the second conductive layer, and

the oxide layer is arranged between the upper surface of the first insulating layer and the second conductive layer.

4. The semiconductor device according to claim 1 , wherein the gate electrode is arranged below the oxide semiconductor layer.

5. The semiconductor device according to claim 1 , wherein the gate electrode is arranged above the oxide semiconductor layer.

6. The semiconductor device according to claim 1 , wherein the first conductive layer contacts the oxide layer at a side wall of the second opening.

7. The semiconductor device according to claim 1 , wherein a pattern of the oxide layer is substantially the same pattern as a pattern of the first conductive layer in a plan view.

8. The semiconductor device according to claim 1 , wherein the oxide layer contains argon.

9. The semiconductor device according to claim 1 , wherein the first insulating layer is an oxide insulating layer,

the oxide layer is an oxide insulating layer with the same composition as the first insulating layer, and

a composition ratio of oxygen in the oxide layer is larger than a composition ratio of oxygen in the first insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
Priority Claims (1)
JP 2019-002939 · Jan 10, 2019 · national
Continuity (2)
Continuation 16735800 · Jan 7, 2020
Related Publication 20220045216A1 · Feb 10, 2022