IP Library › Granted Patent US 11,823,622
Granted Patent B2
US 11,823,622 · App. 17/519,908 · Granted Nov 21, 2023

Pixel and display device including the same

Inventors: Hwa Rang Lee (Yongin-si, KR); Kwi Hyun Kim (Yongin-si, KR); Sang Yong No (Yongin-si, KR); Ji Yeon Choi (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3233G09G3/2007H01L27/156G09G2300/0426G09G2300/0842G09G2310/08G09G2320/0242
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Quick Facts
Patent No.
US 11,823,622
App. No.
17/519,908
Granted
Nov 21, 2023
Kind
B2
Abstract

Provided herein may be a pixel. The pixel may include a driving transistor including a gate electrode coupled to a first node, a first electrode coupled to a first power line, and a second electrode coupled to a second node, a control transistor including a gate electrode coupled to the first node, a first electrode coupled to the second node, and a second electrode that is different from the first electrode, a first emission unit including at least one light-emitting element coupled between the second electrode of the control transistor and a second power line, and a second emission unit including at least one light-emitting element coupled between the second node and the second power line, wherein the second electrode of the control transistor is coupled to a first electrode of the first emission unit.

Claims (54)

1. A pixel, comprising:

a driving transistor comprising a gate electrode electrically and directly coupled to a first node, a first electrode electrically coupled to a first power line, and a second electrode electrically coupled to a second node;

a control transistor comprising a gate electrode electrically and directly coupled to the first node, a first electrode electrically coupled to the second node, and a second electrode that is different from the first electrode;

a first emission unit comprising at least one light-emitting element electrically coupled between the second electrode of the control transistor and a second power line; and

a second emission unit comprising at least one light-emitting element electrically coupled between the second node and the second power line,

wherein the second electrode of the control transistor is electrically coupled to a first electrode of the first emission unit.

2. The pixel according to claim 1 , wherein the driving transistor controls a driving current flowing to the control transistor and to the second emission unit in response to a voltage of the first node.

3. The pixel according to claim 2 , wherein the driving current comprises a first driving current flowing through the control transistor and the first emission unit, and a second driving current flowing through the second emission unit.

4. The pixel according to claim 3 , wherein a magnitude of the first driving current and a magnitude of the second driving current are different from each other.

5. The pixel according to claim 3 , wherein a magnitude of the first driving current is less than a magnitude of the second driving current when the pixel is driven at a low grayscale level.

6. The pixel according to claim 1 , further comprising:

a first scan line through which a first scan signal is supplied;

a second scan line through which a second scan signal is supplied;

a data line through which a data voltage is supplied;

a sensing line through which a sensing voltage is supplied for a sensing period;

a switching transistor comprising a gate electrode electrically coupled to the first scan line, a first electrode electrically coupled to the data line, and a second electrode electrically coupled to the first node; and

a sensing transistor comprising a gate electrode electrically coupled to the second scan line, a first electrode electrically coupled to the sensing line, and a second electrode electrically coupled to the second node.

7. The pixel according to claim 1 , further comprising:

a first storage capacitor electrically coupled between the first node and the second node; and

a second storage capacitor electrically coupled between the first node and a first electrode of the first emission unit.

8. A display device, comprising:

a base layer;

a semiconductor layer on the base layer and comprising a first semiconductor and a second semiconductor;

a gate insulating layer covering the semiconductor layer;

a gate electrode layer on the gate insulating layer and comprising:

a first gate electrode, which partially overlaps the first semiconductor; and

a second gate electrode, which partially overlaps the second semiconductor, extends from the first gate electrode, is integrally formed with the first gate electrode, and is configured to receive a same signal as the first gate electrode;

an interlayer insulating layer covering the gate electrode layer; and

an upper electrode layer on the interlayer insulating layer and comprising a first source electrode electrically coupled to a source region of the first semiconductor, a first drain electrode electrically coupled to a drain region of the first semiconductor, and a second source electrode electrically coupled to a source region of the second semiconductor,

wherein the first semiconductor, the first gate electrode, the first source electrode, and the first drain electrode constitute a driving transistor, and

wherein the second semiconductor, the second gate electrode, the second source electrode, and the first source electrode constitute a control transistor.

9. The display device according to claim 8 , wherein the first source electrode extends from a drain electrode of the control transistor.

10. The display device according to claim 9 , wherein the second source electrode is electrically coupled to the source region of the second semiconductor through a contact hole of the gate insulating layer and the interlayer insulating layer, and

wherein the first source electrode is electrically coupled to a drain region of the second semiconductor through another contact hole of the gate insulating layer and the interlayer insulating layer.

11. The display device according to claim 8 , further comprising:

an overlapped metal layer on the base layer, and overlapping at least parts of the first semiconductor, the first gate electrode, and the first source electrode; and

a buffer layer covering the overlapped metal layer.

12. The display device according to claim 11 , wherein the overlapped metal layer is electrically coupled to the first source electrode through a contact hole of the buffer layer, the gate insulating layer, and the interlayer insulating layer.

13. The display device according to claim 8 , wherein the first source electrode is implemented as a first storage electrode, and

wherein the first storage electrode and the first gate electrode overlap each other, thereby constituting a first storage capacitor.

14. The display device according to claim 8 , further comprising:

a passivation layer covering the upper electrode layer; and

a first emission unit and a second emission unit on the passivation layer,

wherein the second source electrode is electrically coupled to a first electrode of the first emission unit through a contact hole of the passivation layer.

15. The display device according to claim 14 , wherein the first source electrode is electrically coupled to a first electrode of the second emission unit through another contact hole of the passivation layer.

16. A pixel, comprising:

a driving transistor comprising a gate electrode electrically and directly coupled to a first node, a first electrode electrically coupled to a first power line, and a second electrode electrically coupled to a second node;

a control transistor comprising a gate electrode electrically and directly coupled to the second node, a first electrode electrically coupled to the second node, and a second electrode that is different from the first electrode;

a first emission unit comprising at least one light-emitting element electrically coupled between the second electrode of the control transistor and a second power line; and

a second emission unit comprising at least one light-emitting element electrically coupled between the second node and the second power line,

wherein the second electrode of the control transistor is electrically coupled to a first electrode of the first emission unit.

17. The pixel according to claim 16 , wherein the driving transistor controls a driving current flowing to the control transistor and to the second emission unit in response to a voltage of the first node.

18. The pixel according to claim 17 , wherein the driving current comprises a first driving current flowing through the control transistor and the first emission unit, and a second driving current flowing through the second emission unit.

19. The pixel according to claim 18 , wherein a magnitude of the first driving current is less than a magnitude of the second driving current when the pixel is driven at a low grayscale level.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2021
From: LEE, HWA RANG; KIM, KWI HYUN; NO, SANG YONG; CHOI, JI YEON
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 058035/0501 →
Priority Claims (1)
KR 10-2021-0031689 · Mar 10, 2021 · national
Continuity (1)
Related Publication 20220293052A1 · Sep 15, 2022