Granted Patent B2

US 12,224,353 · App. 17/521,261 · Granted Feb 11, 2025

Inventor: Kazushige Takechi (Kanagawa, JP)

Assignee: Wuhan Tianma Micro-Electronics Co., Ltd.

H01L29/7869H01L21/02565H01L27/1225H01L27/1251H01L27/1255H01L27/127H01L29/66757H01L29/66969H01L29/78675H10K59/1213H10K59/1216

Abstract

Claims (70)

1. A circuit comprising:

a polysilicon thin-film transistor comprising:

a polysilicon layer;

a first conductor layer located above the polysilicon layer; and

a first insulator layer located between the first conductor layer and the polysilicon layer; and

an oxide semiconductor thin-film transistor comprising:

an oxide semiconductor layer;

a second conductor layer located above the oxide semiconductor layer; and

a second insulator layer located between the second conductor layer and the oxide semiconductor layer,

wherein the polysilicon layer includes a polysilicon part of the polysilicon thin-film transistor,

wherein the first conductor layer includes a first gate electrode part of the polysilicon thin-film transistor,

wherein the first insulator layer includes a first insulator part located between the first gate electrode part and the polysilicon part,

wherein the oxide semiconductor layer includes an oxide semiconductor part of the oxide semiconductor thin-film transistor,

wherein the second conductor layer includes a second gate electrode part of the oxide semiconductor thin-film transistor,

wherein the second insulator layer includes a second insulator part located between the second gate electrode part and the oxide semiconductor part,

wherein the second insulator layer has a relative permittivity of not less than 8,

wherein the entire area of the second insulator layer is covered with the second conductor layer,

wherein the first insulator layer has a relative permittivity lower than the relative permittivity of the second insulator layer,

wherein the second conductor layer includes an upper electrode part of a capacitive element, and

wherein the second insulator layer includes an insulator part of the capacitive element,

wherein the second conductor layer of the oxide semiconductor thin-film transistor is above of the upper electrode part of the capacitive element,

wherein the second insulator layer of the oxide semiconductor thin-film transistor is above of the insulator part of the capacitive element.

2. The circuit according to claim 1 ,

wherein the oxide semiconductor part includes a channel region and source/drain regions sandwiching the channel region, and

wherein one of the source/drain regions is connected with the first gate electrode part.

3. The circuit according to claim 1 ,

wherein the oxide semiconductor part includes a channel region and source/drain regions sandwiching the channel region,

wherein the polysilicon part includes a channel region and source/drain regions sandwiching the channel region, and

wherein one of the source/drain regions of the oxide semiconductor part is connected with one of the source/drain regions of the polysilicon part.

4. The circuit according to claim 1 , further comprising a silicon-based insulator part having an interface with the oxide semiconductor part and another interface with the second insulator part.

5. The circuit according to claim 1 , further comprising an interfacial insulator part having an interface with the oxide semiconductor part and another interface with the second insulator part,

wherein the interfacial insulator part has a relative permittivity of not less than 8, and

wherein a concentration of carbon in the interfacial insulator part is not less than 1×10 18 cm −3 and a concentration of carbon in the second insulator part is less than 1×10 18 cm −3 .

6. A circuit comprising:

a polysilicon thin-film transistor comprising:

a polysilicon layer;

a first conductor layer located above the polysilicon layer;

a first insulator layer located between the first conductor layer and the polysilicon layer; and

an oxide semiconductor thin-film transistor comprising:

an oxide semiconductor layer;

a second conductor layer located above the oxide semiconductor layer; and

a second insulator layer located between the second conductor layer and the oxide semiconductor layer,

wherein the polysilicon layer includes a polysilicon part of the polysilicon thin-film transistor,

wherein the first conductor layer includes a first gate electrode part of the polysilicon thin-film transistor,

wherein the first insulator layer includes a first insulator part located between the first gate electrode part and the polysilicon part,

wherein the oxide semiconductor layer includes an oxide semiconductor part of the oxide semiconductor thin-film transistor,

wherein the second conductor layer includes a second gate electrode part of the oxide semiconductor thin-film transistor,

wherein the second insulator layer includes a second insulator part located between the second gate electrode part and the oxide semiconductor part,

wherein the second insulator layer has a relative permittivity of not less than 8,

wherein the entire area of the second insulator layer is covered with the second conductor layer,

wherein the oxide semiconductor part includes a channel region and source/drain regions sandwiching the channel region, and

wherein the oxide semiconductor thin-film transistor includes compound interfacial parts each located above a source/drain region, the compound interfacial parts including constituent elements of the oxide semiconductor part and constituent elements of the second insulator layer and having a resistance lower than a resistance of the channel region,

wherein the second conductor layer of the oxide semiconductor thin-film transistor is above of the upper electrode part of a capacitive element,

wherein the second insulator layer of the oxide semiconductor thin-film transistor is above of the insulator part of the capacitive element.

7. A method of manufacturing a circuit, the method comprising:

forming a polysilicon thin-film transistor, wherein the forming the polysilicon thin-film transistor comprises:

forming a polysilicon layer including a polysilicon part of the polysilicon thin-film transistor;

forming a first insulator layer including an insulator part of the polysilicon thin-film transistor on a layer above the polysilicon layer;

forming a first conductor layer including a gate electrode part of the polysilicon thin-film transistor on a layer than above the first insulator layer; and

forming an oxide semiconductor thin-film transistor, wherein the forming the oxide semiconductor thin-film transistor comprises:

forming an oxide semiconductor layer including an oxide semiconductor part of the oxide semiconductor thin-film transistor;

forming a second insulator layer including an insulator part of the oxide semiconductor thin-film transistor on a layer above the oxide semiconductor layer; and

forming a second conductor layer including a gate electrode part of the oxide semiconductor thin-film transistor on a layer above the second insulator layer,

wherein the second insulator layer has a relative permittivity of not less than 8, and

wherein the second conductor layer and the second insulator layer are etched together or the second insulator layer is etched using the second conductor layer as a mask,

wherein the first insulator layer has a relative permittivity lower than the relative permittivity of the second insulator layer,

wherein the second conductor layer includes an upper electrode part of a capacitive element, and

wherein the second insulator layer includes an insulator part of the capacitive element,

wherein the second conductor layer of the oxide semiconductor thin-film transistor is above of the upper electrode part of the capacitive element,

wherein the second insulator layer of the oxide semiconductor thin-film transistor is above of the insulator part of the capacitive element.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (15)