IP Library › Granted Patent US 11,984,890
Granted Patent B2
US 11,984,890 · App. 17/525,899 · Granted May 14, 2024

Scalable interconnected quantum architecture

Inventors: Baleegh Abdo (Fishkill, NY); Jerry M. Chow (Scarsdale, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H03K19/195G06N10/40H01P1/38H01P7/082H10N60/12
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Quick Facts
Patent No.
US 11,984,890
App. No.
17/525,899
Granted
May 14, 2024
Kind
B2
Abstract

A quantum circuit includes a quantum signal unit. There is a first quantum chip comprising a plurality of qubit devices and bi-directionally coupled to the quantum signal unit. A first quantum entangling unit is bi-directionally coupled to the quantum signal unit and configured to generate an entanglement between a first and a second qubit device on the first quantum chip via the quantum signal unit.

Claims (40)

1. A quantum circuit, comprising:

a quantum signal unit;

a first quantum chip comprising a plurality of qubit devices coupled to the quantum signal unit; and

a first quantum entangling unit coupled to the quantum signal unit and configured to generate an entanglement between a first and a second qubit device on the first quantum chip via the quantum signal unit.

2. The quantum circuit of claim 1 , further comprising a second quantum chip including a plurality of qubit devices, wherein:

the second quantum chip is coupled to the quantum signal unit; and

the first quantum entangling unit is configured to generate an entanglement between the first qubit device on the first quantum chip and a third qubit device on the second quantum chip, via the quantum signal unit.

3. The quantum circuit of claim 1 , wherein the first qubit device and the second qubit device of the first quantum chip are not coupled directly.

4. The quantum circuit of claim 1 , wherein the first quantum entangling unit comprises a Josephson mixer device.

5. The quantum circuit of claim 1 , wherein the first quantum entangling unit comprises a beam splitter device.

6. The quantum circuit of claim 1 , wherein the first quantum entangling unit comprises a superconducting transmission line.

7. The quantum circuit of claim 1 , wherein the first quantum entangling unit is on a same substrate as the quantum chip.

8. The quantum circuit of claim 1 , further comprising a second quantum signal unit bi-directionally coupled to the quantum chip.

9. The quantum circuit of claim 8 , further comprising:

a long-range input-output (I/O) port; and

a short-range I/O port coupled to the first quantum entangling unit.

10. The quantum circuit of claim 8 , wherein the first quantum chip, the first quantum entangling unit, and the quantum signal unit are separate components on a printed circuit board (PCB).

11. The quantum circuit of claim 10 , further comprising a second quantum chip bi-directionally coupled between the first quantum signal unit and the second quantum signal unit.

12. The quantum circuit of claim 8 , further comprising a second quantum chip bi-directionally coupled between the first quantum signal unit and the second quantum signal unit.

13. The quantum circuit of claim 12 , wherein:

the first quantum chip is in a first cryogenic refrigeration unit; and

the second quantum chip is in a second cryogenic refrigeration unit that is separate from the first cryogenic refrigeration unit.

14. A quantum circuit, comprising:

a quantum signal unit;

a first quantum chip comprising a plurality of qubit devices and coupled to the quantum signal unit;

a second quantum chip coupled to the first quantum signal unit;

a first quantum entangling unit coupled to the quantum signal unit;

a synthesizer unit bidirectionally coupled to the first quantum chip, the second quantum chip, and the first quantum signal unit; and

a classical processing unit coupled to the synthesizer unit and operative to control the first and second quantum chips.

15. The quantum circuit of claim 14 , wherein the second quantum chip, the synthesizer unit, first quantum signal unit, and the first quantum entangling unit are on a same printed circuit board (PCB).

16. The quantum circuit of claim 15 , wherein:

the PCB is vertically anchored in a cryogenic refrigeration unit; and

the classical processing unit is in a stage of the cryogenic refrigeration unit that is at a higher temperature than the first and second quantum chips.

17. The quantum circuit of claim 15 , further comprising:

a first auxiliary port coupled to the first quantum signal unit;

an amplification or detection unit coupled to an output of the first quantum signal unit; and

a second auxiliary port coupled to the amplification or detection unit.

18. The quantum circuit of claim 14 , wherein the first quantum entangling unit is configured to generate an entanglement between a first and a second qubit device on the first quantum chip.

19. The quantum circuit of claim 18 , wherein the first quantum entangling unit is configured to generate an entanglement between a third qubit device on the first quantum chip and a fourth qubit device on the second quantum chip.

20. The quantum circuit of claim 18 , wherein the first qubit device and the second qubit device of the first quantum chip are not directly coupled.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2021
From: ABDO, BALEEGH; CHOW, JERRY M.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 058105/0747 →
Continuity (1)
Related Publication 20230155593A1 · May 18, 2023
Cited By (1)
US 12,706,605