IP Library › Granted Patent US 12,080,759
Granted Patent B2
US 12,080,759 · App. 17/530,026 · Granted Sep 3, 2024

Transistor source/drain regions and methods of forming the same

Inventors: Yan-Ting Lin (Baoshan Township, TW); Wei-Jen Lai (Keelung, TW); Chien-I Kuo (Chiayi County, TW); Wei-Yuan Lu (Taipei, TW); Chia-Pin Lin (Xinpu Township, TW); Yee-Chia Yeo (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L29/0665H01L21/823468H01L29/42392H01L29/6656H01L29/66742H01L29/78618H01L29/78696
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Quick Facts
Patent No.
US 12,080,759
App. No.
17/530,026
Granted
Sep 3, 2024
Kind
B2
Abstract

In an embodiment, a device includes: a nanostructure; and a source/drain region adjoining a channel region of the nanostructure, the source/drain region including: a first epitaxial layer on a sidewall of the nanostructure, the first epitaxial layer including a germanium-free semiconductor material and a p-type dopant; a second epitaxial layer on the first epitaxial layer, the second epitaxial layer including a germanium-containing semiconductor material and the p-type dopant; and a third epitaxial layer on the second epitaxial layer, the third epitaxial layer including the germanium-containing semiconductor material and the p-type dopant.

Claims (38)

1. A method comprising:

etching a source/drain recess in a nanostructure and a fin;

growing first epitaxial layers from a sidewall of the nanostructure and a top surface of the fin in the source/drain recess;

growing a second epitaxial layer from the first epitaxial layers with a growth process, the growth process having a first bottom-up growth rate from the first epitaxial layers and having a second bottom-up growth rate from the fin and the nanostructure, the first bottom-up growth rate less than the second bottom-up growth rate; and

growing a third epitaxial layer from the second epitaxial layer.

2. The method of claim 1 , wherein the growth process has a lateral growth rate from the first epitaxial layers, a ratio of the first bottom-up growth rate to the lateral growth rate being in a range of 1 to 3.

3. The method of claim 1 , wherein the first epitaxial layers comprise boron-doped silicon, the second epitaxial layer comprises boron-doped silicon germanium, and the third epitaxial layer comprises boron-doped silicon germanium.

4. The method of claim 3 , wherein growing the first epitaxial layers comprises:

exposing the nanostructure and the fin to a silane, diborane, and hydrochloric acid at a temperature in a range of 600° ° C. to 700° C. and at a pressure in a range of 20 Torr to 50 Torr.

5. The method of claim 3 , wherein growing the second epitaxial layer comprises:

exposing the first epitaxial layers to a silane, a germane, diborane, and hydrochloric acid at a temperature in a range of 580° ° C. to 680° C. and at a pressure in a range of 20 Torr to 50 Torr.

6. The method of claim 1 , wherein a first germanium concentration of the first epitaxial layers is less than a second germanium concentration of the second epitaxial layer.

7. The method of claim 6 , wherein a third germanium concentration of the third epitaxial layer is greater than the second germanium concentration of the second epitaxial layer.

8. The method of claim 1 , further comprising:

forming a spacer between the nanostructure and the fin in the source/drain recess, the sidewall of the nanostructure recessed from a sidewall of the spacer, the first epitaxial layers grown until a sidewall of the first epitaxial layers extends beyond the sidewall of the spacer.

9. A method comprising:

etching a source/drain recess in a fin;

growing an epitaxial seed layer from a top surface of the fin in the source/drain recess with a first growth process, a material of the epitaxial seed layer having a first bottom-up growth rate from a material of the fin in the first growth process;

growing an epitaxial liner layer from the epitaxial seed layer with a second growth process, a material of the epitaxial liner layer having a second bottom-up growth rate from the material of the epitaxial seed layer in the second growth process, the material of the epitaxial liner layer having a third bottom-up growth rate from the material of the fin in the second growth process, the first bottom-up growth rate being less than the third bottom-up growth rate, the second bottom-up growth rate being less than the third bottom-up growth rate; and

growing an epitaxial main layer from the epitaxial liner layer.

10. The method of claim 9 , wherein a thickness of the epitaxial seed layer is less than a thickness of the epitaxial liner layer.

11. The method of claim 9 , wherein the epitaxial seed layer comprises boron-doped silicon, the epitaxial liner layer comprises boron-doped silicon germanium, and the epitaxial main layer comprises boron-doped silicon germanium.

12. The method of claim 11 , wherein growing the epitaxial seed layer comprises:

exposing the fin to a silane, diborane, and hydrochloric acid.

13. The method of claim 11 , wherein growing the epitaxial liner layer comprises:

exposing the epitaxial seed layer to a silane, a germane, diborane, and hydrochloric acid.

14. The method of claim 9 , wherein the epitaxial seed layer has a lesser germanium concentration than the epitaxial liner layer.

15. The method of claim 9 , wherein the epitaxial seed layer has a greater dopant concentration than the epitaxial liner layer.

16. A method comprising:

forming a source/drain region adjacent a nanostructure and a spacer by:

growing a first epitaxial layer from a sidewall of the nanostructure, the first epitaxial layer comprising a germanium-free semiconductor material and a p-type dopant;

growing a second epitaxial layer from the first epitaxial layer, the second epitaxial layer comprising a germanium-containing semiconductor material and the p-type dopant; and

growing a third epitaxial layer from the second epitaxial layer, the third epitaxial layer comprising the germanium-containing semiconductor material and the p-type dopant.

17. The method of claim 16 , wherein a sidewall of the spacer is uncovered by the first epitaxial layer and the sidewall of the spacer is covered by the second epitaxial layer.

18. The method of claim 16 , wherein a sidewall of the first epitaxial layer extends beyond a sidewall of the spacer.

19. The method of claim 16 , wherein the third epitaxial layer has a greater concentration of the p-type dopant than the first epitaxial layer and the second epitaxial layer.

20. The method of claim 16 , further comprising:

forming a gate structure around the nanostructure, the spacer disposed between the gate structure and the source/drain region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2022
From: LIN, YAN-TING; LAI, WEI-JEN; KUO, CHIEN-I; LU, WEI-YUAN; LIN, CHIA-PIN; YEO, YEE-CHIA
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 058679/0261 →
Continuity (2)
Provisional Application 63188130 · May 13, 2021
Related Publication 20220367622A1 · Nov 17, 2022
Cited By (2)
US 12,382,716 US 12,707,684