IP Library › Granted Patent US 12,362,708
Granted Patent B2
US 12,362,708 · App. 17/532,778 · Granted Jul 15, 2025

Doherty amplifier with adjustable alpha factor

Inventor: Michael P. Gaynor (Crystal Lake, IL)
Assignee: pSemi Corporation
H03F1/0288H03F3/211H03F2200/546
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Quick Facts
Patent No.
US 12,362,708
App. No.
17/532,778
Granted
Jul 15, 2025
Kind
B2
Abstract

A Doherty amplifier circuit having a tunable impedance and phase (“TIP”) circuit to provide an adjustable alpha factor, which allows for a selection of power added efficiency (PAE) curves that are useful for applications having different modulations or to meet other criteria. Embodiments include a Doherty amplifier having a TIP circuit that provides for tunability of the impedance Z INV (resulting in an adjustable alpha factor) while maintaining the phase of the output of the carrier amplifier at 90° (for a selected polarity)±a low phase variation. Embodiments of the TIP circuit include one or more series-connected TIP cells comprising at least one TIP circuit combined with a tunable phase adjustment circuit. In operation, when the impedance of a TIP cell is adjusted, adjustments within the cell are also made to provide a phase shift correction back towards 90° (at the selected polarity).

Claims (20)

1. An amplifier circuit including a carrier amplifier coupled in parallel with a peaking amplifier, and further including a digitally-tunable impedance and phase circuit coupled to the carrier amplifier and the peaking amplifier, wherein the digitally-tunable impedance and phase circuit is configured to select a power added efficiency (PAE) curve of the amplifier circuit as a function of output power and wherein the digitally-tunable impedance and phase circuit provides tunability of both an impedance level and a phase shift amount of an input signal applied to the amplifier circuit.

2. The amplifier circuit of claim 1 , wherein the digitally-tunable impedance and phase circuit is configured to provide an adjustable alpha factor.

3. The amplifier circuit of claim 2 , wherein the adjustable alpha factor allows for adjustment of a secondary PAE peak as a function of a selected modulation scheme.

4. The amplifier circuit of claim 2 , wherein the adjustable alpha factor allows for adjustment of a secondary PAE peak to optimize for average power level.

5. The amplifier circuit of claim 2 , wherein the PAE of the amplifier circuit with respect to output power is selectable as a function of the adjustable alpha factor.

6. The amplifier circuit of claim 2 , wherein the adjustable alpha factor is adjustable for different modulations of an input signal.

7. The amplifier circuit of claim 2 , wherein the adjustable alpha factor is adjustable for different power levels of an input signal.

8. The amplifier circuit of claim 1 , wherein the digitally-tunable impedance and phase circuit maintains, over a range of impedances, the insertion phase of an applied signal through the tunable impedance and phase circuit at approximately 90°.

9. The amplifier circuit of claim 1 , wherein the digitally-tunable impedance and phase circuit comprises a lumped-element digitally tunable impedance and phase circuit.

10. The amplifier circuit of claim 8 , wherein the digitally-tunable impedance and phase circuit comprises a lumped-element digitally tunable impedance and phase circuit.

11. An amplifier circuit including a carrier amplifier coupled in parallel with a peaking amplifier, and further including a digitally-tunable impedance and phase circuit coupled to the carrier amplifier and the peaking amplifier, the digitally-tunable impedance and phase circuit configured to provide an adjustable alpha factor for the amplifier circuit, wherein different power added efficiency (PAE) curves are selectable as a function of the adjustable alpha factor, and wherein the digitally-tunable impedance and phase circuit provides tunability of both an impedance level and a phase shift amount of an applied signal.

12. The amplifier circuit of claim 11 , wherein each PAE curve includes a peak.

13. The amplifier circuit of claim 11 , wherein the adjustable alpha factor allows for adjustment of a secondary power added efficiency (PAE) peak as a function of a selected modulation scheme.

14. The amplifier circuit of claim 11 , wherein the adjustable alpha factor allows for adjustment of a secondary power added efficiency (PAE) peak to optimize for average power level.

15. The amplifier circuit of claim 11 , wherein peak efficiency of the amplifier circuit with respect to output power is selectable as a function of the adjustable alpha factor.

16. The amplifier circuit of claim 11 , wherein the adjustable alpha factor is adjustable for different modulations of an input signal.

17. The amplifier circuit of claim 11 , wherein the adjustable alpha factor is adjustable for different power levels of an input signal.

18. The amplifier circuit of claim 11 , wherein the digitally-tunable impedance and phase circuit maintains, over a range of impedances, the insertion phase of an applied signal through the tunable impedance and phase circuit at approximately 90°.

19. The amplifier circuit of claim 11 , wherein the digitally-tunable impedance and phase circuit comprises a lumped-element digitally tunable impedance and phase circuit.

20. The amplifier circuit of claim 18 , a wherein the digitally-tunable impedance and phase circuit comprises a lumped-element digitally tunable impedance and phase circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: GAYNOR, MICHAEL P.
To: PSEMI CORPORATION
Reel/Frame 069831/0192 →
Continuity (3)
Continuation 16682842 · Nov 13, 2019
Continuation 15918978 · Mar 12, 2018
Related Publication 20220158592A1 · May 19, 2022
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