Semiconductor device with interlayer insulation structure including metal-organic framework layer and method of manufacturing the same
A semiconductor device includes a substrate and a gate structure disposed over the substrate. The gate structure includes gate electrode layers and interlayer insulation structures that are alternately stacked with each other. The semiconductor device includes a dielectric structure disposed over the substrate to contact a sidewall surface of the gate structure, and a channel layer disposed on a sidewall surface of the dielectric structure over the substrate. Each of the interlayer insulation structure includes an insulation layer and a metal-organic framework layer that are disposed on the same plane.
1. A semiconductor device comprising;
a substrate;
a gate structure disposed over the substrate, the gate structure including gate electrode layers and interlayer insulation structures that are alternately stacked with each other;
a dielectric structure disposed over the substrate to contact a sidewall surface of the gate structure; and
a channel layer disposed on a sidewall surface of the dielectric structure over the substrate,
wherein each of the interlayer insulation structures includes an insulation layer and a metal-organic framework layer that are disposed on the same plane,
wherein the insulation layer and the metal-organic framework layer contact portions of the gate electrode layer, respectively.
2. The semiconductor device of claim 1 , wherein the insulation layer and the metal-organic framework layer are disposed to contact each other in a direction parallel to a surface of the substrate.
3. The semiconductor device of claim 1 , wherein the metal-organic framework layer is disposed closer to the dielectric structure than the insulation layer.
4. The semiconductor device of claim 1 , wherein the gate electrode layers are disposed to contact the insulation layer and the metal-organic framework layer in a direction perpendicular to a surface of the substrate.
5. The semiconductor device of claim 1 , wherein the insulation layer includes at least one of oxide, nitride, and oxynitride.
6. The semiconductor device of claim 1 , wherein the metal-organic framework layer includes a porous structure.
7. The semiconductor device of claim 1 , wherein the metal-organic framework layer includes a metal-organic framework that includes cavities.
8. The semiconductor device of claim 1 ,
wherein the dielectric structure includes:
a barrier layer disposed on the sidewall surface of the gate structure;
a charge storage layer disposed on a sidewall surface of the barrier layer; and
a tunnel layer disposed on a sidewall surface of the charge storage layer.
9. The semiconductor device of claim 1 , wherein sidewall surfaces of the gate electrode layers are located, in a direction parallel to the surface of the substrate, farther from the channel layer than sidewall surfaces of the interlayer insulation structures.
10. The semiconductor device of claim 9 ,
wherein the dielectric structure includes:
a barrier layer in contact with the gate electrode layers in a direction parallel to the surface of the substrate and in contact with the metal-organic framework layer in a direction perpendicular to the surface of the substrate;
a charge storage layer disposed on a sidewall surface of the barrier layer; and
a tunnel layer disposed to contact the barrier layer, the charge storage layer, and the metal-organic framework layer.
11. The semiconductor device of claim 1 ,
wherein the dielectric structure includes:
a ferroelectric memory layer disposed on the sidewall surface of the gate structure; and
an interfacial insulation layer disposed on a sidewall surface of the ferroelectric memory layer.
12. A semiconductor device comprising;
a substrate;
an electrode structure disposed over the substrate, the electrode structure including horizontal electrode layers and interlayer insulation structures that are alternately stacked with each other;
a dielectric structure disposed over the substrate to contact a sidewall surface of the electrode structure; and
a vertical electrode layer disposed on a sidewall surface of the dielectric structure, over the substrate and extending in a direction perpendicular to a surface of the substrate,
wherein each of the interlayer insulation structures includes an insulation layer and a metal-organic framework layer that are disposed on the same plane,
wherein the insulation layer and the metal-organic framework layer contact portions of the horizontal electrode layers, respectively.
13. The semiconductor device of claim 12 , wherein the insulation layer and the metal-organic framework layer are disposed to contact each other in a direction parallel to the surface of the substrate.
14. The semiconductor device of claim 12 , wherein the metal-organic framework layer is disposed closer to the dielectric structure than the insulation layer.
15. The semiconductor device of claim 12 , wherein the insulation layer includes at least one of oxide, nitride, and oxynitride.
16. The semiconductor device of claim 12 , wherein the metal-organic framework layer includes a porous structure.
17. The semiconductor device of claim 12 , wherein the metal-organic framework layer includes a metal-organic framework with cavities.