IP Library Granted Patent US 12,243,876
Granted Patent B2
US 12,243,876 · App. 17/544,159 · Granted Mar 4, 2025

Display device and tiled display device including the same

Inventor: Doo Hyun Lee (Seongnam-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H01L27/124H01L25/162H01L25/167H01L27/1218H01L24/32H01L2224/32137
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,243,876
App. No.
17/544,159
Granted
Mar 4, 2025
Kind
B2
Abstract

A display device includes a first substrate including a display area and a non-display area adjacent to the display area, a first voltage line disposed on the first substrate and supplying a first voltage, a second substrate disposed on the first voltage line, and a thin film transistor layer disposed on the second substrate and comprising a plurality of thin film transistors and a second voltage line disposed in the non-display area and electrically connected to the first voltage line through a first contact hole penetrating the second substrate.

Claims (77)

1. A display device comprising:

a first substrate including:

a display area including a plurality of emission areas; and

a non-display area adjacent to the display area;

a first voltage line disposed on the first substrate and supplying a first voltage;

a first connection line overlapping an emission area among the plurality of emission areas and having a same material as the first voltage line;

a second substrate disposed on the first voltage line; and

a thin film transistor layer disposed on the second substrate and comprising:

a plurality of thin film transistors;

a second voltage line disposed in the non-display area and electrically connected to the first voltage line through a first contact hole penetrating the second substrate; and

a second connection line electrically connected to the first connection line through a second contact hole penetrating the second substrate, the second connection line having a same material as the second voltage line.

2. The display device of claim 1 , wherein

the first voltage line is disposed on a plurality of edges of the first substrate, and

the second voltage line is disposed on a plurality of edges of the thin film transistor layer.

3. A display device comprising:

a first substrate including:

a display area; and

a non-display area adjacent to the display area;

a first voltage line disposed on the first substrate and supplying a first voltage;

a second substrate disposed on the first voltage line; and

a thin film transistor layer disposed on the second substrate and comprising:

a plurality of thin film transistors; and

a second voltage line disposed in the non-display area and electrically connected to the first voltage line through a first contact hole penetrating the second substrate, and wherein the first and second voltage lines have a same width in a plan view.

4. The display device of claim 1 , wherein a width of the first voltage line in a plan view is greater than a width of the second voltage line in a plan view.

5. The display device of claim 1 , wherein the first voltage line is disposed on an edge of the display area and in the non-display area.

6. The display device of claim 1 , wherein the first voltage line includes:

a first portion disposed in the non-display area;

a second portion extending from the first portion and traversing the display area; and

a third portion protruding from the second portion disposed in the display area.

7. The display device of claim 1 , wherein the first voltage line includes:

a first portion disposed in the non-display area; and

a second portion disposed in the display area, extending in a first direction and a second direction intersecting the first direction, and having a grid shape.

8. The display device of claim 7 , wherein

the display area further includes:

a light blocking area surrounding each of the plurality of emission areas, and

the second portion of the first voltage line overlaps the light blocking area in a thickness direction of the display device.

9. The display device of claim 1 , wherein

the first connection line is disposed on an edge of the display area, and

the first voltage line is disposed in the non-display area adjacent to a plurality of edges of the first substrate except for the edge of the display area.

10. The display device of claim 1 , wherein the second connection line is electrically connected to the plurality of thin film transistors and supplies a data voltage to the plurality of thin film transistors.

11. The display device of claim 1 , further comprising:

a pad part under the first substrate and electrically connected to the first connection line through a third contact hole penetrating the first substrate;

a flexible film under the first substrate and electrically connected to the pad part; and

a data driver on the flexible film to supply a data voltage to the first connection line.

12. The display device of claim 1 , further comprising:

a light emitting element layer disposed on the thin film transistor layer and including a plurality of light emitting elements electrically connected between the plurality of thin film transistors and the second voltage line.

13. The display device of claim 12 , wherein the thin film transistor layer comprises:

a gate insulating layer disposed on the second substrate;

an interlayer insulating layer disposed on the gate insulating layer; and

a connection electrode disposed on the interlayer insulating layer and electrically connecting the plurality of light emitting elements and the plurality of thin film transistors, wherein

the second connection line and the connection electrode disposed on the interlayer insulating layer include a same material.

14. A tiled display device comprising:

a plurality of display devices including:

a display area including a plurality of emission areas; and

a non-display area adjacent to the display area; and

a bonding member bonding the plurality of display devices,

wherein each of the plurality of display devices comprises:

a first substrate;

a first voltage line disposed on the first substrate and supplying a first voltage;

a first connection line overlapping an emission area among the plurality of emission areas and being supplied with a data voltage;

a second substrate disposed on the first voltage line; and

a thin film transistor layer disposed on the second substrate and comprising:

a plurality of thin film transistors;

a second voltage line disposed in the non-display area and electrically connected to the first voltage line through a first contact hole penetrating the second substrate; and

a second connection line electrically connected to the first connection line through a second contact hole penetrating the second substrate.

15. The tiled display device of claim 14 , wherein the first and second voltage lines have a same width in a plan view.

16. The tiled display device of claim 14 , wherein a width of the first voltage line in a plan view is greater than a width of the second voltage line in a plan view.

17. The tiled display device of claim 14 , wherein the first voltage line includes:

a first portion disposed in the non-display area;

a second portion extending from the first portion and traversing the display area; and

a third portion protruding from the second portion disposed in the display area.

18. The tiled display device of claim 14 , wherein the first voltage line includes:

a first portion disposed in the non-display area; and

a second portion disposed in the display area, extending in a first direction and a second direction intersecting the first direction, and having a grid shape.

19. The tiled display device of claim 18 , wherein

the display area includes: a light blocking area surrounding each of the plurality of emission areas, and

the second portion of the first voltage line overlaps the light blocking area in a thickness direction of the tiled display device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2021
From: LEE, DOO HYUN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 058355/0750 →
Priority Claims (1)
KR 10-2021-0033508 · Mar 15, 2021 · national
Continuity (1)
Related Publication 20220293636A1 · Sep 15, 2022
References Cited (13)
US 10256221B2 · Bibl et al. · 2019 [cited by applicant]
US 20160124259A1 · Kawata · 2016 [cited by examiner]
US 20200312886A1 · Yuan et al. · 2020 [cited by applicant]
US 20200381410A1 · Yueh · 2020 [cited by examiner]
US 20220004281A1 · Hyun et al. · 2022 [cited by applicant]
US 20220140046A1 · Zhou et al. · 2022 [cited by applicant]
CN 111584562 · 2020 [cited by applicant]
CN 111724742 · 2020 [cited by applicant]
JP 201881197 · 2018 [cited by applicant]
KR 1020160038959 · 2016 [cited by applicant]
KR 1020190048642 · 2019 [cited by applicant]
KR 1020220004895 · 2022 [cited by applicant]
Extended European Search Report for European Application No./Patent No. 22162318.4, dated Aug. 12, 2022. [cited by applicant]