IP Library Granted Patent US 11,923,322
Granted Patent B2
US 11,923,322 · App. 17/544,722 · Granted Mar 5, 2024

Integrated tunable filter architecture

Inventors: William R. Smith, Jr. (Lake in the Hills, IL); Jaroslaw Adamski (Streamwood, IL); Dan William Nobbe (Crystal Lake, IL); Edward Nicholas Comfoltey (San Diego, CA); Jingbo Wang (San Diego, CA)
Assignee: pSemi Corporation
H01L23/66H03H7/01H03H7/0153H03H7/06H03H7/12H03H7/1758H01L2223/6672H01L2924/0002H03H2007/013H03H2210/036Y10T29/4913
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Quick Facts
Patent No.
US 11,923,322
App. No.
17/544,722
Granted
Mar 5, 2024
Kind
B2
Abstract

An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.

Claims (26)

1. An integrated circuit including:

(a) a frequency-based circuit having a common signal path;

(b) at least one tunable filter coupled to the common signal path of the frequency-based circuit, wherein each tunable filter is configured to be selectively activated to filter unwanted frequencies from the common signal path of the frequency-based circuit; and

(c) at least one bypassable compensation capacitor circuit, each coupled in parallel with a corresponding tunable filter and configured to match and substitute for an effective capacitance of such tunable filter when such tunable filter is not activated;

wherein the frequency-based circuit and each tunable filter are located on a single integrated circuit chip.

2. The integrated circuit of claim 1 , wherein at least one tunable filter includes at least one of a tunable notch filter or a tunable bandpass filter.

3. The integrated circuit of claim 2 , wherein the tunable notch filter or tunable bandpass filter includes a tunable RLC filter.

4. The integrated circuit of claim 3 , wherein the tunable RLC filter includes at least one of a tunable capacitor C and a tunable inductor L.

5. The integrated circuit of claim 4 , wherein at least one of the tunable capacitor C or tunable inductor L is digitally tunable.

6. The integrated circuit of claim 1 , wherein at least one tunable filter includes at least one of a tunable low pass filter or a tunable high pass filter.

7. The integrated circuit of claim 6 , wherein the tunable low pass filter or tunable high pass filter includes a tunable RLC filter.

8. The integrated circuit of claim 7 , wherein the tunable RLC filter includes at least one of a tunable capacitor C and a tunable inductor L.

9. The integrated circuit of claim 8 , wherein at least one of the tunable capacitor C or tunable inductor L is digitally tunable.

10. The integrated circuit of claim 1 , wherein the frequency-based circuit is at least one of a radio frequency switch, a radio frequency duplexer, or a radio frequency diplexer.

11. The integrated circuit of claim 1 , wherein at least one tunable filter includes multiple selectable fixed frequency notch filters.

12. The integrated circuit of claim 1 , wherein at least one tunable filter is selectively settable to a minimum filtering state when its filtering function is not needed.

13. The integrated circuit of claim 1 , wherein the frequency-based circuit and each tunable filter are co-designed to absorb and compensate for residual and other parasitic impedances present in the integrated circuit, and wherein the co-designed frequency-based circuit and at least one tunable filter have a total insertion loss that is less than the total insertion loss that would exist if such tunable filter was external to the integrated circuit.

14. The integrated circuit of claim 1 , further including a bypassable low-pass filter coupled to the common signal path for filtering out a broad range of high frequencies that may adversely affect the frequency-based circuit.

15. An integrated circuit including:

(a) a frequency-based circuit having a signal path; and

(b) at least one digitally tunable filter coupled to the signal path of the frequency-based circuit, wherein each digitally tunable filter is configured to be selectively activated to filter unwanted frequencies from the signal path of the frequency-based integrated circuit and wherein at least one digitally tunable filter includes at least one of a digitally tunable low pass filter or a digitally tunable high pass filter;

wherein the frequency-based circuit and each digitally tunable filter are located on a single integrated circuit chip.

16. The integrated circuit of claim 15 , further including a bypassable low-pass filter coupled to the signal path for filtering out a broad range of high frequencies that may adversely affect the frequency-based circuit.

17. The integrated circuit of claim 15 , wherein at least one digitally tunable filter includes at least one of a digitally tunable notch filter or a digitally tunable bandpass filter.

18. The integrated circuit of claim 15 , wherein the frequency-based circuit and each digitally tunable filter are co-designed to absorb and compensate for residual and other parasitic impedances present in the integrated circuit, and wherein the co-designed frequency-based circuit and at least one digitally tunable filter have a total insertion loss that is less than the total insertion loss that would exist if such digitally tunable filter was external to the integrated circuit.

19. The integrated circuit of claim 15 , wherein at least one digitally tunable filter is selectively settable to a minimum filtering state when a filtering function thereof is not needed.

Assignments (3)
CHANGE OF NAME Recorded May 15, 2025
From: PEREGRINE SEMICONDUCTOR CORPORATION
To: PSEMI CORPORATION
Reel/Frame 071291/0063 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED AT REEL 070876 FRAME 0423. ASSIGNORS HEREBY CONFIRM THE ASSIGNMENT. Recorded May 8, 2025
From: SMITH, WILLIAM R.; ADAMSKI, JAROSLAW; NOBBE, DAN WILLIAM; COMFOLTEY, EDWARD NICHOLAS; WANG, JINGBO
To: PEREGRINE SEMICONDUCTOR CORPORATION
Reel/Frame 071799/0714 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2025
From: SMITH, WILLIAM R.; ADAMSKI, JAROSLAW; NOBBE, DAN WILLIAM; COMFOLTEY, EDWARD NICHOLAS; WANG, JINGBO
To: PSEMI CORPORATION
Reel/Frame 070876/0423 →
Continuity (4)
Continuation 16596626 · Oct 8, 2019
Division 15603230 · May 23, 2017
Division 14181332 · Feb 14, 2014
Related Publication 20220173058A1 · Jun 2, 2022
Cited By (1)
US 12,230,592