IP Library Granted Patent US 11,482,165
Granted Patent B2
US 11,482,165 · App. 17/547,393 · Granted Oct 25, 2022

Pixel driving circuit

Inventor: Jae Hoon Lee (Ulsan, KR)
Assignee: SAPIEN SEMICONDUCTORS INC.
G09G3/32G09G2300/08G09G2310/0289G09G2310/08G09G2330/021
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Quick Facts
Patent No.
US 11,482,165
App. No.
17/547,393
Granted
Oct 25, 2022
Kind
B2
Abstract

The present embodiments disclose a pixel driving circuit and a display device including the same. A pixel driving circuit according to an embodiment of the present disclosure includes a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes constituting a frame during a light-emitting period and a second pixel circuit storing a bit value of image data in a data writing period and generating the control signal based on the bit value and a clock signal in the light-emitting period.

Claims (11)

1. A pixel driving circuit electrically connected to a luminous element, the circuit comprising:

a first circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes included in a frame, and

a second circuit configured to store bit values of image data in the frame, and generate the control signal based on the stored bit values and a clock signal such that each subframe included in the frame is controlled according to each bit value.

2. The pixel driving circuit of claim 1 , wherein the first circuit includes:

a first transistor configured to output a driving current, and

a second transistor configured to transmit or block the driving current to the luminous element according to the control signal.

3. The pixel driving circuit of claim 2 , wherein the first circuit includes a level shifter that converts a voltage level of the control signal.

4. The pixel driving circuit of claim 2 , wherein the first transistor constitutes a current mirror circuit, together with an external circuit of the pixel driving circuit.

5. The pixel driving circuit of claim 1 , wherein the second circuit includes:

a memory configured to store the bit values of the image data, and

a pulse width modulation (PWM) controller configured to read the bit values from the memory and determine a pulse width of the control signal for a subframe based on a length of the subframe and a bit value corresponding to the subframe.

Priority Claims (1)
KR 10-2018-0074941 · Jun 28, 2018 · national
Continuity (2)
Continuation 17047544
Related Publication 20220101784A1 · Mar 31, 2022