Electronic devices and methods of manufacturing electronic devices

1. An electronic device, comprising:

a substrate comprising:

a dielectric structure comprising a dielectric structure top side and a dielectric structure bottom side opposite to the dielectric structure top side; and

a conductive structure comprising a protruded via that extends outward from the dielectric structure bottom side;

an electronic component coupled to the conductive structure at the dielectric structure top side; and

a terminal coupled to the protruded via such that the protruded via extends into the terminal;

wherein:

the dielectric structure comprises a via dielectric comprising a via dielectric bottom side that defines the dielectric structure bottom side and a via dielectric top side opposite to the via dielectric bottom side;

the via dielectric comprises an aperture that extends from the via dielectric top side to the via dielectric bottom side;

the protruded via is within the aperture;

a portion of the protruded via extends out of the aperture at the via dielectric top side and overlaps onto via dielectric top side;

the conductive structure comprises a seed along sidewalls of the aperture;

the protruded via comprises a via tip that extends from the dielectric structure bottom side;

the seed is interposed between the sidewalls of the aperture and the protruded via;

the seed comprises a barrier layer and a first plating seed interposed between the barrier layer and the protruded via; and

the first plating seed extends outside of the aperture and covers the via tip.

2. The electronic device of claim 1 , further comprising:

a second plating seed interposed between the first plating seed and the terminal, wherein:

the second plating seed extends along a portion of the dielectric structure bottom side.

3. The electronic device of claim 1 , wherein:

the barrier layer comprises a dielectric; and

the via tip is devoid of the barrier layer.

4. The electronic device of claim 1 , wherein:

the barrier layer comprises a conductor; and

the barrier layer covers the via tip.

5. The electronic device of claim 1 , wherein:

the protruded via comprises a via tip comprising a rounded shape.

6. The electronic device of claim 5 , wherein:

the terminal comprises a pillar and a solder tip; and

the via tip extends into the pillar.

7. The electronic device of claim 1 , wherein:

the dielectric structure comprises a first dielectric comprising a first dielectric top side and a first dielectric bottom side;

the first dielectric bottom side contacts the via dielectric top side; and

the first dielectric bottom side contacts the portion of the protruded via that overlaps onto the via dielectric top side.

8. The electronic device of claim 1 , wherein:

the substrate comprises a redistribution layer (RDL) substrate;

the dielectric structure comprises a plurality of dielectric layers; and

the conductive structure comprises traces embedded between the plurality of dielectric layers.

9. The electronic device of claim 1 , further comprising:

a body over the dielectric structure top side and covering at least portions of the electronic component.

10. An electronic device, comprising:

a substrate comprising:

a dielectric structure comprising a dielectric structure top side and a dielectric structure bottom side opposite to the dielectric structure top side, wherein:

the dielectric structure comprises:

a via dielectric comprising a via dielectric bottom side that defines the dielectric structure bottom side and via dielectric top side opposite to the via dielectric bottom side; and

a first dielectric comprising a first dielectric top side and a first dielectric bottom side that contacts the via dielectric top side; and

the via dielectric comprise an aperture that extends from the via dielectric top side to the via dielectric bottom side;

and

a conductive structure comprising:

a protruded via within the aperture and comprising a via tip that extends outward from the dielectric structure bottom side such that the dielectric structure bottom side and the via tip reside on different planes and a portion of the protruded via extends outside of the aperture to overlap the via dielectric top side;

a seed over the via tip and over surfaces of the aperture between the via dielectric and the protruded via; and

a substrate internal terminal at the dielectric structure top side and coupled to the protruded via;

wherein:

the first dielectric bottom side contacts the portion of the protruded via overlapping the via dielectric top side;

an electronic component coupled to the substrate internal terminal at the dielectric structure top side;

a body encapsulating the electronic component; and

a terminal coupled to the protruded via;

wherein:

the via tip extends into the terminal.

11. The electronic device of claim 10 , wherein:

the seed comprises a barrier and a seed layer;

the seed layer is interposed between the barrier and the protruded via; and

the seed layer covers the via tip.

12. The electronic device of claim 10 , wherein:

a surface of the electronic component is exposed from the body.

13. The electronic device of claim 10 , wherein:

the protruded via comprises a plated material;

the via tip comprises a side surface exposed from the via dielectric; and

the terminal comprises:

a terminal seed covering the via tip including the side surface of the via tip; and

a bump over the terminal seed.

14. The electronic device of claim 10 , wherein:

the electronic component comprises a component terminal;

the component terminal is attached to the substrate internal terminal; and

the electronic device comprises an underfill between the component terminal and the substrate internal terminal.

15. A method for making an electronic device, comprising:

providing a substrate comprising:

a dielectric structure comprising a dielectric structure top side and a dielectric structure bottom side opposite to the dielectric structure top side, wherein:

the dielectric structure comprises a via dielectric that defines the dielectric structure bottom side; and

the via dielectric comprises an aperture;

and

a conductive structure comprising:

a protruded via within the aperture and comprising a via tip that extends outward from the dielectric structure bottom side so that the dielectric structure bottom side and the via tip reside on different planes;

a seed over surfaces of the aperture between the via dielectric and the protruded via; and

a conductor at the dielectric structure top side and coupled to the protruded via;

coupling an electronic component to the conductor at the dielectric structure top side;

providing a body encapsulating the electronic component; and

providing a terminal coupled to the protruded via;

wherein:

the via tip extends into the terminal; and

providing the substrate comprises:

providing the via dielectric comprising a height;

providing the aperture in the via dielectric, wherein the aperture has a depth less than the height to define a lower dielectric under the aperture;

providing the seed over the surfaces of the aperture;

providing the protruded via over the seed and within the aperture; and

removing a portion of the via dielectric including the lower dielectric to expose the via tip and define the dielectric structure bottom side.

16. The method of claim 15 , wherein:

providing the substrate comprises:

providing a carrier comprising an upper side;

providing the via dielectric over the upper side of the carrier; and

removing the carrier before removing the portion of the via dielectric.

17. The method of claim 15 , wherein:

providing the substrate comprises providing the seed comprising a barrier and a seed layer over the barrier; and

the barrier and the seed layer cover the via tip.

18. The method of claim 15 , wherein:

providing the substrate comprises providing the seed comprising a barrier and a seed layer over the barrier; and

the seed layer is over the via tip but at least a portion of the via tip is exposed from the barrier.

19. An electronic device, comprising:

a substrate comprising:

a dielectric structure comprising a dielectric structure top side and a dielectric structure bottom side opposite to the dielectric structure top side; and

a conductive structure comprising a protruded via that extends outward from the dielectric structure bottom side;

an electronic component coupled to the conductive structure at the dielectric structure top side; and

a terminal coupled to the protruded via such that the protruded via extends into the terminal;

wherein:

the dielectric structure comprises a via dielectric comprising a via dielectric bottom side that defines the dielectric structure bottom side and a via dielectric top side opposite to the via dielectric bottom side;

the via dielectric comprises an aperture that extends from the via dielectric top side to the via dielectric bottom side;

the protruded via is within the aperture;

a portion of the protruded via extends out of the aperture at the via dielectric top side and overlaps onto via dielectric top side;

the protruded via comprises a via tip comprising a rounded shape;

the terminal comprises a pillar and a solder tip; and

the via tip extends into the pillar.

20. The electronic device of claim 19 , wherein:

the conductive structure comprises a seed along sidewalls of the aperture;

the protruded via comprises a via tip that extends from the dielectric structure bottom side; and

the seed is interposed between the sidewalls of the aperture and the protruded via.

21. The electronic device of claim 20 , wherein:

the seed comprises a barrier and a first plating seed interposed between the barrier and the protruded via; and

the first plating seed extends outside of the aperture and covers the via tip.

22. The electronic device of claim 21 , further comprising:

a second plating seed interposed between the first plating seed and the terminal, wherein:

the second plating seed extends along a portion of the dielectric structure bottom side.

23. The electronic device of claim 21 , wherein:

the barrier layer comprises a dielectric; and

the via tip is devoid of the barrier.