Display device

1. A display device, comprising:

a substrate on which a plurality of first sub-pixels disposed in first columns and a plurality of second sub-pixels disposed in second columns are defined;

a plurality of data lines disposed on one sides of the plurality of first sub-pixels and another sides of the plurality of second sub-pixels; and

a plurality of parking voltage lines disposed between the plurality of first sub-pixels and the plurality of second sub-pixels, wherein the plurality of parking voltage lines are electrically connected to some of the plurality of data lines, and

wherein the plurality of parking voltage lines and the plurality of data lines are different and separated from each other.

2. The display device of claim 1 , further comprising:

connection transistors electrically connecting the plurality of parking voltage lines and first data lines of the plurality of data lines; and

an enable line electrically connected to gate electrodes of the connection transistors.

3. The display device of claim 2 , wherein the connection transistors is connected to the enable line, so that the plurality of parking voltage lines and the first data lines are electrically connected with each other.

4. The display device of claim 3 , wherein the first data lines are disposed on the one sides of the plurality of first sub-pixels and the plurality of parking voltage lines are disposed on the another side of the plurality of first sub-pixels.

5. The display device of claim 4 , wherein the second data lines of the plurality of data lines are disposed on the one sides of the plurality of first sub-pixels and are insulated from the plurality of parking voltage lines.

6. The display device of claim 5 , wherein the plurality of first sub-pixels includes a plurality of green sub-pixels, and the plurality of second sub-pixels includes a plurality of red sub-pixels and a plurality of blue sub-pixels.

7. The display device of claim 1 , wherein the plurality of first sub-pixels and the plurality of second sub-pixels have a flip structure.

8. The display device of claim 1 , further comprising a pixel circuit disposed in each of the plurality of first sub-pixels and the plurality of second sub-pixels,

wherein the pixel circuit includes:

a driving transistor including low-temperature polysilicon;

a first transistor connected between the driving transistor and the plurality of data lines;

a second transistor coupled to the driving transistor and the first transistor;

a third transistor connected between the driving transistor and an initialization line;

a fourth transistor connected between the driving transistor and a light emitting element;

a fifth transistor connected to the gate electrode of the driving transistor; and

a sixth transistor connected with the light emitting element and the fourth transistor.

9. The display device of claim 8 , wherein the fifth transistor includes an oxide semiconductor.

10. The display device of claim 8 , wherein the plurality of parking voltage lines and the driving transistor and the plurality of data lines and the driving transistor form a parasitic capacitance.

11. A display device, comprising:

a substrate on which a plurality of first sub-pixels disposed in first columns and a plurality of second sub-pixels disposed in second columns are defined;

a plurality of pixel circuits disposed in the plurality of first sub-pixels and the plurality of second sub-pixels;

a plurality of data lines extending in a column direction between the plurality of first sub-pixels and the plurality of second sub-pixels and connected to the plurality of pixel circuits; and

a plurality of parking voltage lines extended in the column direction between the plurality of first sub-pixels and the plurality of second sub-pixels and separated from the plurality of pixel circuits,

wherein the plurality of parking voltage lines are disposed in columns in which the plurality of data lines are not disposed among a plurality of columns, and

wherein the plurality of parking voltage lines and the plurality of data lines are different and separated from each other.

12. The display device of claim 11 , wherein each of the plurality of pixel circuits includes,

a driving transistor connected to a light emitting element;

a first transistor connecting the driving transistor and the plurality of data lines;

a second transistor connecting the driving transistor and a high potential power line;

a third transistor connecting the driving transistor and an initialization line;

a fourth transistor connected to the light emitting element and an emission control line;

a fifth transistor connected to the driving transistor and a storage capacitor; and

a sixth transistor connecting the light emitting element and a reset line.

13. The display device of claim 12 , wherein the fifth transistor includes an oxide semiconductor.

14. The display device of claim 11 , wherein, during a blank frame in which a direct current (DC) voltage is applied to the plurality of data lines, the plurality of parking voltage lines are electrically connected to some data lines among the plurality of data lines, and

wherein, during an active frame in which an alternating current (AC) voltage is applied to the plurality of data lines, the plurality of parking voltage lines are electrically insulated from the some data lines.

15. The display device of claim 14 , further comprising:

a plurality of connection transistors connecting the some data lines and the plurality of parking voltage lines; and

an enable line electrically connected to gate electrodes of the plurality of connection transistors.

16. The display device of claim 15 , wherein the plurality of connection transistors are turned on during the blank frame, and the plurality of connection transistors are turned off during the active frame.

17. The display device of claim 14 , wherein, during the blank frame, the first transistor and the fifth transistor are turned off, the sixth transistor transmits a reset voltage to an anode of the light emitting element, and the third transistor transmits an initialization voltage to a node between the driving transistor and the fifth transistor.