IP Library › Granted Patent US 11,488,527
Granted Patent B2
US 11,488,527 · App. 17/553,184 · Granted Nov 1, 2022

Display device capable of discharging residual charges

Inventor: Jaeseung Lee (Paju-si, KR)
Assignee: LG DISPLAY CO., LTD.
G09G3/3225H01L27/3244G09G2310/0251
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Quick Facts
Patent No.
US 11,488,527
App. No.
17/553,184
Granted
Nov 1, 2022
Kind
B2
Abstract

A display device capable of discharging residual charges includes a discharging circuitry to discharge charges remaining in a GIP driver, a Gate D-IC, a Source D-IC, a Gamma IC, etc. to a ground GND when a display panel is powered off, so that the display device protects the display panel by rapidly discharging residual charges that may accumulate on the display panel and a printed circuit board when power is off.

Claims (52)

1. A display device capable of discharging residual charges, the display device comprising:

a display panel including a plurality of gate lines, a plurality of data lines and a plurality of pixels;

a timing controller configured to generate reference clocks and a start clock;

a gate driver including:

a level shifter configured to receive the reference clocks and the start clock from the timing controller to generates gate clocks; and

a gate in panel (GIP) unit configured to generate gate pulses based on the gate clocks output from the level shifter, and to output the gate pulses to the plurality of gate lines;

a power supply configured to generate power required for operation of the display panel;

a boost converter configured to supply an output voltage of a level higher than a level of an input voltage of the power generated from the power supply;

a discharging circuitry connected to and disposed between the level shifter and the boost converter to discharge charges remaining in the level shifter to a ground when the display panel is powered off,

wherein the discharging circuitry includes:

a resistor connected to a connection point between the level shifter and the boost converter; and

a thin-film transistor having a drain terminal connected to the resistor and a source terminal connected to the ground, and

wherein, when the display panel is powered off, a discharging control signal is supplied to a gate terminal of the thin-film transistor such that the thin-film transistor is turned on, and thus a gate high voltage signal from the level shifter is discharged to the ground through the resistor, the drain terminal and the source terminal.

2. The display device of claim 1 , wherein, when the display panel is powered on, a discharging control signal is not supplied to a gate terminal of the thin-film transistor such that the thin-film transistor is turned off, and thus a gate high voltage signal from the boost converter is input to the level shifter.

3. The display device of claim 1 , wherein the discharging circuitry increases or decreases a discharging time based on a magnitude of a value of the resistor.

4. A display device capable of discharging residual charges, the display device comprising:

a display panel including a plurality of gate lines, a plurality of data lines and a plurality of pixels;

a gate driver configured to output a gate signal to the plurality of gate lines;

a power supply configured to generate power required for an operation of the display panel;

a boost converter configured to supply an output voltage of a level higher than a level of an input voltage of the power generated from the power supply;

a discharging circuitry connected to and disposed between the gate driver and the boost converter to discharge charges remaining in the gate driver to a ground when the display panel is powered off,

wherein the discharging circuitry includes:

a resistor connected to a connection point between the level shifter and the boost converter; and

a thin-film transistor having a drain terminal connected to the resistor and a source terminal connected to the ground, and

wherein, when the display panel is powered off, a discharging control signal is supplied to a gate terminal of the thin-film transistor such that the thin-film transistor is turned on, and thus a gate high voltage signal from the level shifter is discharged to the ground through the resistor, the drain terminal and the source terminal.

5. The display device of claim 4 , wherein, when the display panel is powered on, a discharging control signal is not supplied to a gate terminal of the thin-film transistor such that the thin-film transistor is turned off, and thus a gate high voltage signal from the boost converter is input to the gate driver.

6. A display device capable of discharging residual charges, the display device comprising:

a display panel including a plurality of gate lines, a plurality of data lines, and a plurality of pixels;

a gate driver configured to output a gate signal to the plurality of gate lines;

a data driver configured to output a data signal to the plurality of data lines;

a power supply configured to generate power required for an operation of the display panel;

a buck converter configured to supply an output voltage of a level lower than a level of an input voltage of the power generated from the power supply;

a discharging circuitry connected to and disposed between the buck converter and the data driver to discharge charges remaining in the data driver to a ground when the display panel is powered off,

wherein the discharging circuitry includes:

a resistor connected to a connection point between the data driver and the buck converter; and

a thin-film transistor having a drain terminal connected to the resistor and a source terminal connected to the ground, and

wherein, when the display panel is powered off, a discharging control signal is applied to a gate terminal of the thin-film transistor such that the thin-film transistor is turned on, and thus residual charges from the data driver are discharged to the ground through the resistor, the drain terminal, and the source terminal.

7. A display device capable of discharging residual charges, the display device comprising:

a display panel including a plurality of gate lines, a plurality of data lines, and a plurality of pixels;

a gate driver configured to output a gate signal to the plurality of gate lines;

a data driver configured to output a data signal to the plurality of data lines;

a power supply configured to generate power required for an operation of the display panel;

a buck converter configured to supply an output voltage of a level lower than a level of an input voltage of the power generated from the power supply;

a gamma voltage generator configured to:

receive the output voltage from the buck converter to generate a gamma reference voltage;

divide the gamma reference voltage using a voltage dividing circuit to generate a gray level-based gamma compensation voltage; and

supply the gray level-based gamma compensation voltage to the data driver; and

a discharging circuitry connected to and disposed between the buck converter and the gamma voltage generator to discharge charges remaining in the data driver and the gamma voltage generator to a ground when the display panel is powered off,

wherein the discharging circuitry includes:

a resistor connected to a connection point between the gamma voltage generator and the buck converter; and

a thin-film transistor having a drain terminal connected to the resistor and a source terminal connected to the ground, and

wherein, when the display panel is powered off, a discharging control signal is applied to a gate terminal of the thin-film transistor such that the thin-film transistor is turned on, and thus residual charges from the data driver and the gamma voltage generator are discharged to the ground through the resistor, the drain terminal, and the source terminal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2021
From: LEE, JAESEUNG
To: LG DISPLAY CO., LTD.
Reel/Frame 058562/0034 →
Priority Claims (1)
KR 10-2020-0180521 · Dec 22, 2020 · national
Continuity (1)
Related Publication 20220199008A1 · Jun 23, 2022
Cited By (1)
US 12,300,164