Semiconductor device, method for fabricating the semiconductor device, and memory device and system including the semiconductor device
A semiconductor device according to an embodiment of the present disclosure may include: a stack structure including a plurality of first conductive patterns and a plurality of dielectric layers, which are alternately stacked, the stack structure having a stepped structure such that any one of the first conductive patterns further protrudes than the first conductive pattern positioned immediately above it; a plurality of second conductive patterns which are respectively formed over protrusions of the first conductive patterns; a plurality of contact plugs which overlap the plurality of second conductive patterns, respectively, and pass through the overlapping second conductive patterns and the stack structure; and a sealing layer pattern which is interposed between the first conductive patterns and the contact plugs and separates the first conductive patterns from the contact plugs.
1. A method for fabricating a semiconductor device, comprising:
forming a stack structure comprising a plurality of sacrificial layers and a plurality of dielectric layers, which are alternately stacked, the stack structure having a stepped structure such that any one of the sacrificial layers further protrudes than the sacrificial layer positioned immediately above it;
forming a plurality of sacrificial pads over protrusions of the plurality of sacrificial layers, respectively;
forming a plurality of contact holes which overlap the plurality of sacrificial pads, respectively, and pass through the overlapping sacrificial pads and the stack structure;
forming grooves by recessing a portion of the sacrificial layers exposed through the contact holes;
forming a sealing layer which fills the grooves;
forming contact plugs which fill the contact holes;
forming a slit which passes through the stack structure;
removing the sacrificial layers and sacrificial pads exposed through the slit; and
filling, with a conductive material, spaces from which the sacrificial layers and the sacrificial pads have been removed.
2. The method of claim 1 , wherein the contact plugs are in direct contact with the conductive material filling the spaces, from which the sacrificial pads have been removed, without being in direct contact with the conductive material filling the spaces from which the sacrificial layers have been removed.
3. The method of claim 1 , wherein the forming of the grooves is performed such that a distance from a side surface of the contact hole to a side surface of the groove is smaller than a distance from the side surface of the contact hole to a side surface of the sacrificial pad.
4. The method of claim 1 , wherein the sacrificial layers, the sacrificial pads and the sealing layer have different etch rates.
5. The method of claim 1 , wherein the sacrificial layers, the sacrificial pads, and the dielectric layers have different etch rates.
6. The method of claim 1 , further comprising a peripheral circuit element disposed below the stack structure, wherein the forming of the contact holes is performed to a depth that exposes the peripheral circuit element.
7. The method of claim 1 , wherein each of the sacrificial pads is formed to be spaced apart from a dielectric layer having a bottom surface that is positioned at substantially the same level as a sacrificial pad, from the sacrificial pads, is located at.
8. The method of claim 1 , wherein each of the sacrificial pads has a smaller thickness than a dielectric layer having a bottom surface positioned at substantially the same level as a sacrificial pad, from the sacrificial pads, is located at.
9. The method of claim 1 , wherein the forming of the contact holes further comprises forming support holes which overlap the plurality of sacrificial pads, respectively, pass through the overlapping sacrificial pads and the stack structure, and are spaced apart from the contact holes, and the method further comprises, before the removing of the sacrificial layers and the sacrificial pads, forming support pillars which fill the support holes.
10. The method of claim 9 , wherein the forming of the support pillars comprises:
filling the support holes together with the contact holes with the contact plugs during the forming of the contact plugs;
selectively removing the contact plugs in the support holes; and
filling the support holes with a dielectric material.
11. The method of claim 9 , wherein the support holes have substantially the same depth as that of the contact holes.
12. A method for fabricating a semiconductor device, comprising:
forming a stack structure comprising a plurality of sacrificial layers and a plurality of dielectric layers, which are alternately stacked, the stack structure having a stepped structure such that any one of the sacrificial layers further protrudes than the sacrificial layer positioned immediately above it;
forming a plurality of sacrificial pads over protrusions of the plurality of sacrificial layers, respectively;
forming a plurality of sacrificial pads on protrusions of the plurality of sacrificial layers, respectively;
forming a plurality of contact holes which overlap the plurality of sacrificial pads, respectively, and pass through the overlapping sacrificial pads and the stack structure;
forming a sealing layer on a side wall of the contact holes;
forming contact plugs which fill the contact holes having the sealing layer formed thereon;
forming a slit which passes through the stack structure;
removing the sacrificial pads exposed through the slit, and removing the sealing layer exposed by removal of the sacrificial pads;
removing the sacrificial layers exposed through the slit; and
filling, with a conductive material, spaces from which the sacrificial layers and the sacrificial pads have been removed.