IP Library › Granted Patent US 12,408,511
Granted Patent B2
US 12,408,511 · App. 17/573,956 · Granted Sep 2, 2025

Thin-film transistor substrate and display apparatus including the same

Inventor: Keunwoo Kim (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K59/1213H10D30/6755H10D30/6757H10K50/844H10K59/1216H10K59/873
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Quick Facts
Patent No.
US 12,408,511
App. No.
17/573,956
Granted
Sep 2, 2025
Kind
B2
Abstract

A thin-film transistor substrate includes: a substrate; a semiconductor layer on the substrate, where the semiconductor layer includes a first conductive region, a second conductive region, and a first channel region between the first conductive region and the second conductive region; a gate insulating layer on the semiconductor layer, where the gate insulating layer includes a first charge implanted region which overlaps a portion of the first channel region and into which charged ions are implanted; and a first gate electrode on the gate insulating layer to overlap the first channel region. The first charge implanted region is shifted to the first conductive region or the second conductive region.

Claims (24)

1. A thin-film transistor substrate comprising:

a substrate;

a semiconductor layer on the substrate, wherein the semiconductor layer comprises a first conductive region, a second conductive region, and a first channel region between the first conductive region and the second conductive region;

a gate insulating layer on the semiconductor layer, wherein the gate insulating layer comprises a first charge implanted region which overlaps a portion of the first channel region and into which charged ions are implanted; and

a first gate electrode on the gate insulating layer to overlap the first channel region,

wherein a distance between a center of the first charge implanted region and one of the first conductive region and the second conductive region is less than a distance between a center of the first channel region and the one of the first conductive region and the second conductive region when viewed in a thickness direction of the substrate.

2. The thin-film transistor substrate of claim 1 , wherein

the first conductive region and the second conductive region comprise a P-type dopant, and

the charged ions implanted into the first charge implanted region have a negative charge.

3. The thin-film transistor substrate of claim 2 , wherein the charged ions implanted into the first charge implanted region comprise at least one selected from F − , Cl − , O 2− , and P 3− .

4. The thin-film transistor substrate of claim 1 , wherein a concentration of the charged ions implanted into the first charge implanted region is less than a concentration of a dopant doped into the first conductive region.

5. The thin-film transistor substrate of claim 1 , wherein an area of the first charge implanted region is less than about a half of an area of the first channel region.

6. The thin-film transistor substrate of claim 1 , wherein a width of the first charge implanted region is less than about a half of a width of the first channel region.

7. The thin-film transistor substrate of claim 1 , wherein

the first charge implanted region is shifted to the second conductive region, and

the second conductive region is a drain region.

8. The thin-film transistor substrate of claim 1 , wherein

the semiconductor layer further comprises a second channel region apart from the first channel region, and

the gate insulating layer further comprises a second charge implanted region overlapping the second channel region,

wherein the second conductive region is between the first channel region and the second channel region.

9. The thin-film transistor substrate of claim 8 , wherein

a distance between the center of the first charge implanted region and the second conductive region is less than a distance between the center of the first channel region and the second conductive region, and

a distance between a center of the second charge implanted region and the second conductive region is less than a distance between a center of the second channel region and the second conductive region.

10. The thin-film transistor substrate of claim 1 , wherein a thickness of the first charge implanted region is less than a thickness of the gate insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2022
From: KIM, KEUNWOO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 058631/0056 →
Priority Claims (1)
KR 10-2021-0064213 · May 18, 2021 · national
Continuity (1)
Related Publication 20220376117A1 · Nov 24, 2022
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