IP Library › Patent Application 17574743
Patent Application
App. No. 17/574,743

TFT PHOTODETECTOR INTEGRATED ON DISPLAY PANEL

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Quick Facts
Patent No.
US None
App. No.
17/574,743
Abstract

A method of fabricating a thin-film transistor (TFT) photodetector includes forming diffusion layers on a glass substrate or a transparent flexible substrate, wherein the diffusion layers include a P-type diffusion layer of P-type polycrystalline or amorphous silicon, for use as an active layer and P+-type diffusion layers of amorphous or polycrystalline silicon at both sides of the P-type diffusion layer, forming an insulating oxide layer on the formed diffusion layers, forming an N-type diffusion layer of polycrystalline or amorphous silicon on the insulating oxide film, forming a gate to be used as a light receiving part by photo-patterning the N-type diffusion layer, etching the generated insulating oxide layer except for only a necessary part in a photoresist (PR) patterning process, removing a remaining area of the P+-type diffusion layer except for areas to be used as a source and a drain by etching, and generating electrodes by depositing a metal in etched parts of the insulating oxide film in the source and the drain.

Claims (10)

1 . A method of fabricating a thin-film transistor (TFT) photodetector, the method comprising:

forming diffusion layers on a glass substrate or a transparent flexible substrate, wherein the diffusion layers include a P-type diffusion layer of P-type polycrystalline or amorphous silicon, for use as an active layer and P+-type diffusion layers of amorphous or polycrystalline silicon at both sides of the P-type diffusion layer;

forming an insulating oxide layer on the formed diffusion layers;

forming an N-type diffusion layer of polycrystalline or amorphous silicon on the insulating oxide film;

forming a gate to be used as a light receiving part by photo-patterning the N-type diffusion layer;

etching the generated insulating oxide layer except for only a necessary part in a photoresist (PR) patterning process;

removing a remaining area of the P+-type diffusion layer except for areas to be used as a source and a drain by etching; and

generating electrodes by depositing a metal in etched parts of the insulating oxide film in the source and the drain.

2 . The method according to claim 1 , wherein the insulating oxide film is formed by sputtering or plasma enhanced chemical vapor deposition (PECVD).

3 . The method according to claim 1 , wherein the N-type diffusion layer is formed by depositing amorphous silicon and then crystallizing the deposited amorphous silicon by thermal treatment, or directly depositing polycrystalline silicon on the transparent substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2025
From: KIM, HOON, DR.
To: TMRW ELECTRONICS, SARL
Reel/Frame 072672/0352 →