IP Library › Granted Patent US 11,810,914
Granted Patent B2
US 11,810,914 · App. 17/577,048 · Granted Nov 7, 2023

Semiconductor device

Inventors: Tomoyuki Obata (Matsumoto, JP); Soichi Yoshida (Matsumoto, JP); Tetsutaro Imagawa (Matsumoto, JP); Seiji Momota (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L27/0727H01L27/0664H01L29/0804H01L29/7391
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Quick Facts
Patent No.
US 11,810,914
App. No.
17/577,048
Granted
Nov 7, 2023
Kind
B2
Abstract

Provided is a semiconductor device having transistor and diode sections. The semiconductor device comprises: a gate metal layer provided above the upper surface of a semiconductor substrate; an emitter electrode provided above the upper surface of the semiconductor substrate; a first conductivity-type emitter region provided on the semiconductor substrate upper surface side in the transistor section; a gate trench section, which is provided on the semiconductor substrate upper surface side in the transistor section, is electrically connected to the gate metal layer, and is in contact with the emitter region; an emitter trench section, which is provided on the semiconductor substrate upper surface side in the diode section, and is electrically connected to the emitter electrode; and a dummy trench section, which is provided on the semiconductor substrate upper surface side, is electrically connected to the gate metal layer, and is not in contact with the emitter region.

Claims (22)

1. A semiconductor device having a transistor section and a current sense section, the semiconductor device comprising:

a gate wire section provided above an upper surface of a semiconductor substrate;

an emitter electrode provided above the upper surface of the semiconductor substrate;

a plurality of trench sections aligned in a preset alignment direction on an upper surface side of the semiconductor substrate,

a first well region provided to surround the transistor section in a plane parallel to the upper surface of the semiconductor substrate;

a second well region provided to surround the current sense section in the plane parallel to the upper surface of the semiconductor substrate,

wherein the plurality of trench sections comprises a gate trench section electrically connected to the gate wire section, an emitter trench section electrically connected to the emitter electrode,

a gate emitter ratio obtained by dividing a number of the gate trench section included in a unit length in the alignment direction by a number of the emitter trench section is greater in the current sense section than in the transistor section; and

wherein a shortest distance between an emitter region and the second well region provided in the current sense section is greater than a shortest distance between the emitter region and the first well region provided in the transistor section.

2. The semiconductor device according to claim 1 , wherein both the gate trench section and the emitter trench section are arranged in the transistor section, and

the gate trench section is arranged and the emitter trench section is not arranged in the current sense section.

3. The semiconductor device according to claim 1 , further comprising:

a first conductivity-type drift region provided in the semiconductor substrate;

a first conductivity-type emitter region provided on the upper surface side of the semiconductor substrate and having a doping concentration higher than the drift region;

the first well region formed to be deeper than a range from the upper surface of the semiconductor substrate to a lower end of the trench section; and

the second well region formed to be deeper than the range from the upper surface of the semiconductor substrate to the lower end of the trench section,

wherein the shortest distance between the emitter region and the second well region provided in the current sense section is in the preset alignment direction the shortest distance between the emitter region and the first well region provided in the transistor section is in the preset alignment direction.

4. The semiconductor device according to claim 1 , further comprising:

a first conductivity-type drift region provided in the semiconductor substrate;

a first conductivity-type emitter region provided on the upper surface side of the semiconductor substrate and having a doping concentration higher than the drift region;

the first well region formed to be deeper than a range from the upper surface of the semiconductor substrate to a lower end of the trench section; and

the second well region formed to be deeper than the range from the upper surface of the semiconductor substrate to the lower end of the trench section, wherein the shortest distance between the emitter region and the second well region provided in the current sense section is in a direction perpendicular to the preset alignment direction and the shortest distance between the emitter region and the first well region provided in the transistor section is in the direction perpendicular to the preset alignment direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2022
From: OBATA, TOMOYUKI; YOSHIDA, SOICHI; IMAGAWA, TETSUTARO; MOMOTA, SEIJI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 058668/0988 →
Priority Claims (1)
JP 2017-239713 · Dec 14, 2017 · national
Continuity (3)
Division 16693367 · Nov 24, 2019
Continuation PCTJP2018037481 · Oct 5, 2018
Related Publication 20220139908A1 · May 5, 2022