IP Library Granted Patent US 12,207,565
Granted Patent B2
US 12,207,565 · App. 17/583,539 · Granted Jan 21, 2025

Multi-level multiferroic memory device and related methods

Inventors: Matt Bauer (Melbourne, FL); Steven R. Snyder (Palm Bay, FL)
Assignee: EAGLE TECHNOLOGY, LLC
H10N50/80H10B61/00H10N30/853H10N30/8536H10N30/8548H10N30/8561H10N35/85H10N50/01H10N50/85
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Quick Facts
Patent No.
US 12,207,565
App. No.
17/583,539
Granted
Jan 21, 2025
Kind
B2
Abstract

An electronic device may include a first electrode, a first magnetostrictive layer coupled to the first electrode, a plurality of alternating ferromagnetic and insulating layers stacked above the first magnetostrictive layer, a second electrode electrically coupled to an intermediate ferromagnetic layer in the stack of ferromagnetic and insulating layers, a second magnetostrictive layer above the stack of ferromagnetic and insulating layers, and a third electrode electrically coupled to the second magnetostrictive layer. At least one ferromagnetic layer below the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and at least one ferromagnetic layer above the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.

Claims (52)

1. An electronic device comprising:

a first electrode;

a first magnetostrictive layer coupled to the first electrode;

a plurality of alternating ferromagnetic and insulating layers stacked above the first magnetostrictive layer;

a second electrode electrically coupled to an intermediate ferromagnetic layer in the stack of ferromagnetic and insulating layers;

a second magnetostrictive layer above the stack of ferromagnetic and insulating layers; and

a third electrode electrically coupled to the second magnetostrictive layer;

at least one ferromagnetic layer below the intermediate ferromagnetic layer being switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and at least one ferromagnetic layer above the intermediate ferromagnetic layer being switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.

2. The electronic device of claim 1 further comprising:

a first piezoelectric layer below the first magnetostrictive layer; and

a second piezoelectric layer above the second magnetostrictive layer.

3. The electronic device of claim 2 wherein the first and second piezoelectric layers comprise at least one of BaTiO 3 , Ba 0.95 Sr 0.05 TiO 3 , Hf 0.5 Zr 0.5 O 2 , PbTiO 3 , YMnO 3 , BiFeO 3 , Si doped HfO 2 , SrBi 2 TaO 9 , and PbZr x Ti 1-x O 3 .

4. The electronic device of claim 1 wherein the first and second magnetostrictive layers comprise at least one of Co, Fe, NiFe, MnAs, Fe 4 N, MnAl, Co 4 N, LSMO, SrRuO 2 , and CoFeB.

5. The electronic device of claim 1 wherein the ferromagnetic layers comprise at least one of Co, Fe, NiFe, MnAs, Fe 4 N, MnAl, Co 4 N, LSMO, SrRuO 2 , and CoFeB.

6. The electronic device of claim 1 wherein the insulating layers comprise at least one of BaTiO 3 , Ba 0.95 Sr 0.05 TiO 3 , Hf 0.5 Zr 0.5 O 2 , PbTiO 3 , YMnO 3 , BiFeO 3 , Si doped HfO 2 , SrBi 2 TaO 9 , La 0.1 Bi 0.9 MnO 3 , Al 2 O 3 , GaO, GeO, MgO, GaAs, and AlGaAs.

7. The electronic device of claim 1 further comprising a substrate beneath the first magnetostrictive layer.

8. The electronic device of claim 7 wherein the substrate comprises at least one of SrTiO 3 , Si, SmScO 3 , and TbScO 3 .

9. The electronic device of claim 1 comprising electronic circuitry coupled to the first, second and third electrodes for operation as a memory device.

10. The electronic device of claim 9 wherein the memory device comprises a plurality of memory cells, each operable to store sixteen memory states.

11. A memory comprising:

a substrate; and

a plurality of memory cells above the substrate, each memory cell operable to store sixteen memory states and comprising:

a first electrode;

a first magnetostrictive layer coupled to the first electrode;

a plurality of alternating ferromagnetic and insulating layers stacked above the first magnetostrictive layer;

a second electrode electrically coupled to an intermediate ferromagnetic layer in the stack of ferromagnetic and insulating layers;

a second magnetostrictive layer above the stack of ferromagnetic and insulating layers; and

a third electrode electrically coupled to the second magnetostrictive layer;

at least one ferromagnetic layer below the intermediate ferromagnetic layer being switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and at least one ferromagnetic layer above the intermediate ferromagnetic layer being switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.

12. The memory of claim 11 wherein each memory cell further comprises:

a first piezoelectric layer below the first magnetostrictive layer; and

a second piezoelectric layer above the second magnetostrictive layer.

13. The memory of claim 12 wherein the first and second piezoelectric layers comprise at least one of BaTiO 3 , Ba 0.95 Sr 0.05 TiO 3 , Hf 0.5 Zr 0.5 O 2 , PbTiO 3 , YMnO 3 , BiFeO 3 , Si doped HfO 2 , SrBi 2 TaO 9 , and PbZr x Ti 1-x O 3 .

14. The memory of claim 11 wherein the first and second magnetostrictive layers comprise at least one of Co, Fe, NiFe, MnAs, Fe 4 N, MnAl, CON, LSMO, SrRuO 2 , and CoFeB.

15. The memory of claim 11 wherein the ferromagnetic layers comprise at least one of Co, Fe, NiFe, MnAs, Fe 4 N, MnAl, Co 4 N, LSMO, SrRuO 2 , and CoFeB.

16. The memory of claim 11 wherein the insulating layers comprise at least one of BaTiO 3 , Ba 0.95 Sr 0.05 TiO 3 , Hf 0.5 Zr 0.5 O 2 , PbTiO 3 , YMnO 3 , BiFeO 3 , Si doped HfO 2 , and SrBi 2 TaO 9 .

17. The memory of claim 11 wherein the substrate comprises at least one of SrTiO 3 , Si, SmScO 3 , and TbScO 3 .

18. A method for making an electronic device comprising:

forming a first magnetostrictive layer coupled to a first electrode;

forming a plurality of alternating ferromagnetic and insulating layers stacked above the first magnetostrictive layer;

forming a second electrode electrically coupled to an intermediate ferromagnetic layer in the stack of ferromagnetic and insulating layers;

forming a second magnetostrictive layer above the stack of ferromagnetic and insulating layers; and

forming a third electrode electrically coupled to the second magnetostrictive layer;

at least one ferromagnetic layer below the intermediate ferromagnetic layer being switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and at least one ferromagnetic layer above the intermediate ferromagnetic layer being switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.

19. The method of claim 18 further comprising:

forming a first piezoelectric layer below the first magnetostrictive layer; and

forming a second piezoelectric layer above the second magnetostrictive layer.

20. The method of claim 19 wherein the first and second piezoelectric layers comprise at least one of BaTiO 3 , Ba 0.95 Sr 0.05 TiO 3 , Hf 0.5 Zr 0.5 O 2 , PbTiO 3 , YMnO 3 , BiFeO 3 , Si doped HfO 2 , SrBi 2 TaO 9 , and PbZr x Ti 1-x O 3 .

21. The method of claim 18 wherein the first and second magnetostrictive layers and the ferromagnetic layers comprise at least one of Co, Fe, NiFe, MnAs, Fe 4 N, MnAl, Co 4 N, LSMO, SrRuO 2 , and CoFeB.

22. The method of claim 18 wherein the insulating layers comprise at least one of BaTio 3 , Ba 0.95 Sr 0.05 TiO 3 , Hf 0.5 Zr 0.5 O 2 , PbTiO 3 , YMnO 3 , BiFeO 3 , Si doped HfO 2 , and SrBi 2 TaO 9 .

23. The method of claim 18 further comprising forming a substrate beneath the first magnetostrictive layer.

24. The method of claim 23 wherein the substrate comprises at least one of SrTiO 3 , Si, SmScO 3 , and TbScO 3 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2022
From: BAUER, MATT; SNYDER, STEVEN R.
To: EAGLE TECHNOLOGY, LLC
Reel/Frame 058769/0371 →
Continuity (1)
Related Publication 20230240149A1 · Jul 27, 2023
References Cited (37)
US 7633795B2 · Shimomura et al. · 2009 [cited by applicant]
US 10593389B2 · Atulasimha et al. · 2020 [cited by applicant]
US 11043251B2 · Shen et al. · 2021 [cited by applicant]
US 20090067224A1 · Hochstrat et al. · 2009 [cited by applicant]
US 20100102369A1 · Tian · 2010 [cited by examiner]
US 20140043895A1 · Bibes · 2014 [cited by applicant]
US 20160141333A1 · Bandyopadhyay et al. · 2016 [cited by applicant]
US 20170178780A1 · Taniyama et al. · 2017 [cited by applicant]
US 20170236993A1 · Gopman et al. · 2017 [cited by applicant]
US 20200294581A1 · Bibes et al. · 2020 [cited by applicant]
US 20200335690A1 · Eom et al. · 2020 [cited by applicant]
US 20210390994A1 · Xu · 2021 [cited by examiner]
CN 102272847 · 2011 [cited by applicant]
CN 203521478U · 2014 [cited by examiner]
CN 103915109 · 2014 [cited by applicant]
CN 104603882 · 2015 [cited by applicant]
CN 105531767 · 2016 [cited by applicant]
CN 105762275A · 2016 [cited by examiner]
CN 106328807 · 2017 [cited by applicant]
CN 107068173 · 2017 [cited by applicant]
CN 109243511A · 2019 [cited by examiner]
CN 110164494 · 2019 [cited by applicant]
DE 112013007054 · 2016 [cited by applicant]
JP 2013236014 · 2013 [cited by applicant]
KR 20160003763 · 2016 [cited by applicant]
WO WO2012149414 · 2012 [cited by applicant]
WO WO2013090937 · 2013 [cited by applicant]
WO WO2016198886 · 2016 [cited by applicant]
WO WO2019213663 · 2019 [cited by applicant]
K.P. Jayachandran, J.F.A. Madeira, J.M. Guedes, H.C. Rodrigues, “Laminate composite magnetoelectric multiferroics optimized by global derivative-free optimization method,” Computational Materials Science, vol. 148, 2018… [cited by examiner]
Fong et al. “Spin-Transfer Torque Memories: Devices, Circuits, and Systems” Proceedings of the IEEE; . vol. 104, No. 7, Jul. 2016; pp. 40. [cited by applicant]
Amiri et al. “Electric-Field-Controlled Magnetoelectric RAM: Progress, Challenges, and Scaling” IEEE Transactions On Magnetics, vol. 51, No. 11, Nov. 2015; pp. 7. [cited by applicant]
Shaodi Wang “Design, Evaluation and Co-optimization of Emerging Devices and Circuits” Proquest 2017; ProQuest No. 10284410; pp. 24. [cited by applicant]
Yuewei Yin “A review on all-perovskite multiferroic tunnel junctions” Journal of Materiomics vol. 3, Issue 4, Dec. 2017, pp. 245-254; pp. 33. [cited by applicant]
U.S. Appl. No. 17/583,596, filed Jan. 25, 2022 Bauer et al. [cited by applicant]
U.S. Appl. No. 17/583,564, filed Jan. 25, 2022 Bauer et al. [cited by applicant]
Spaldin, “Multiferroics: Past, present, and future”, Material Research Society Bulletin, vol. 42, May 2017, pp. 385-390. [cited by applicant]