IP Library Granted Patent US 11,824,046
Granted Patent B2
US 11,824,046 · App. 17/583,872 · Granted Nov 21, 2023

Symbiotic network on layers

Inventors: Javier A. DeLaCruz (San Jose, CA); Belgacem Haba (Saratoga, CA); Rajesh Katkar (Milpitas, CA)
Assignee: Invensas LLC
H01L25/0657G06F15/7825H01L23/53204H01L24/08H01L24/83H01L25/18G06F2015/763H01L2224/08145H01L2225/06524H01L2924/1433H01L2924/1434
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Quick Facts
Patent No.
US 11,824,046
App. No.
17/583,872
Granted
Nov 21, 2023
Kind
B2
Abstract

The technology relates to a system on chip (SoC). The SoC may include a plurality of network layers which may assist electrical communications either horizontally or vertically among components from different device layers. In one embodiment, a system on chip (SoC) includes a plurality of network layers, each network layer including one or more routers, and more than one device layers, each of the plurality of network layers respectively bonded to one of the device layers. In another embodiment, a method for forming a system on chip (SoC) includes forming a plurality of network layers in an interconnect, wherein each network layer is bonded to an active surface of a respective device layer in a plurality of device layer.

Claims (34)

1. A system on chip (SoC) comprising:

a first network layer;

a second network layer;

a first device layer having a first surface, the first surface being bonded to the first network layer;

a second device layer having a second surface and a third opposite surface, the second surface of the second device layer being bonded to the second network layer and the third opposite surface of the second device layer being bonded to the first network layer; and

a third device layer having a fourth surface bonded to the second network layer,

wherein:

each of the first device layer, the second device layer, and the third device layer includes a set of one or more components;

each set of the one or more components includes a network interface; and

the first network layer and the second network layer are configured to cooperatively route data between the first device layer, the second device layer, and the third device layer.

2. The SoC of claim 1 , wherein the second device layer includes one or more pathways to pass the data between the first network layer and the second network layer.

3. The SoC of claim 1 , wherein of each component in the first, second, and third sets of one or more components connects said component to at least one of the first network layer or second network layer via conductive structures.

4. The SoC of claim 3 , wherein the first network layer includes a first set of one or more routers and the second network layer includes a second set of one or more routers.

5. The SoC of claim 4 , wherein the network interface of each component in the first, second, and third sets of one or more components is connected to at least one router in the first or second sets of one or more routers.

6. The system of claim 5 , wherein the network interface of each component in the first, second, and third sets of one or more components is configured to packetize and depacketize the data.

7. The SoC of claim 5 , wherein first and second sets of one or more routers are configured to route the data between the first device layer, the second device layer, and the third device layer.

8. The SoC of claim 5 , wherein the first set of one or more routers is configured to route the data from a first component in first set of one or more components through the second device layer to the second set of one or more routers in the second network layer.

9. The SoC of claim 8 , wherein the second set of one or more routers in the second network layer is configured to route the data from the first component in the first set of one or more components to a second component in the third set of one or more components in the third device layer.

10. The SoC of claim 8 , wherein route the data from a first component in set of one or more components in the first device layer through the second device layer to the second set of one or more routers in the second network layer includes routing the data around a third component in the second set of one or more components in the second device layer.

11. The SoC of claim 1 , wherein the first network layer includes a first set of one or more routers and the second network layer includes a second set of one or more routers.

12. The SoC of claim 11 , wherein the first and second sets of one or more routers are configured to route the data between the first device layer, the second device layer, and the third device layer.

13. The SoC of claim 1 , wherein the first network layer is configured to control operation of the second network layer.

14. The SoC of claim 1 , wherein the first network layer and the second network layer are configured to operate independently.

15. A system on chip (SoC) comprising:

a memory layer that includes one or more memory segments;

a first network layer;

a second network layer;

a first device layer having a first surface, the first surface being bonded to the first network layer;

a second device layer having a second surface and a third opposite surface, the second surface of the second device layer being bonded to the second network layer and the third opposite surface of the second device layer being bonded to the first network layer;

a third device layer having a fourth surface bonded to the second network layer; and

a third network layer that includes one or more routers, wherein:

the third network layer has a fifth surface bonded to the third device layer and a sixth surface, opposite to the fifth surface, bonded to the memory layer; and

each of the one or more memory segments is connected to at least one of the one or more routers in the third network layer via one or more conductive structures.

16. The SoC of claim 15 , wherein the first network layer, the second network layer, and the third network layer are configured to cooperatively route data between the first device layer, the second device layer, the third device layer, and the memory layer.

Assignments (4)
SECURITY INTEREST Recorded May 3, 2023
From: ADEIA GUIDES INC.; ADEIA IMAGING LLC; ADEIA MEDIA HOLDINGS LLC; ADEIA MEDIA SOLUTIONS INC.; ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR INC.; ADEIA SEMICONDUCTOR SOLUTIONS LLC; ADEIA SEMICONDUCTOR TECHNOLOGIES LLC; ADEIA SOLUTIONS LLC
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 063529/0272 →
CERTIFICATE OF CONVERSION & CHANGE OF NAME Recorded Apr 4, 2022
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 059581/0435 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2022
From: DELACRUZ, JAVIER A.; HABA, BELGACEM; KATKAR, RAJESH
To: INVENSAS CORPORATION
Reel/Frame 059163/0132 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2022
From: DELACRUZ, JAVIER A.; HABA, BELGACEM; KATKAR, RAJESH
To: INVENSAS CORPORATION
Reel/Frame 058771/0170 →
Cited By (1)
US 12,283,572