IP Library › Granted Patent US 11,782,787
Granted Patent B2
US 11,782,787 · App. 17/584,034 · Granted Oct 10, 2023

Dynamic error control configuration for memory systems

Inventors: Deping He (Boise, ID); Zhengang Chen (San Jose, CA)
Assignee: Micron Technology, Inc.
G06F11/1068G06F11/076G06F11/0772G06F11/0793
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,782,787
App. No.
17/584,034
Granted
Oct 10, 2023
Kind
B2
Abstract

Methods, systems, and devices for a dynamic error control configuration for memory systems are described. The memory system may receive a read command and retrieve a set of data from a location of the memory system based on the read command. The memory system may perform a first type of error control operation on the set of data to determine whether the set of data includes one or more errors. If the set of data includes the one or more errors, the memory system may retrieve a second set of data from the location of the memory system and determine whether a syndrome weight satisfies a threshold. The memory system may perform a second type of error control operation on the second set of data based on determining that the syndrome weight satisfies the threshold.

Claims (80)

1. An apparatus, comprising:

a memory device;

a controller coupled with the memory device and configured to cause the apparatus to:

retrieve a first set of data from a first location of a memory system based at least in part on a read command;

perform a first type of error control operation on the first set of data over a first duration based at least retrieving the first set of data, the first type of error control operation configured to identify up to a first quantity of errors;

determine whether the first set of data includes one or more errors based at least in part on performing the first type of error control operation;

retrieve a second set of data from the first location of the memory system based at least in part on determining that the first set of data includes the one or more errors;

determine whether a syndrome weight associated with the first type of error control operation satisfies a threshold based at least in part on retrieving the second set of data; and

perform a second type of error control operation on the second set of data over a second duration based at least in part on retrieving the second set of data and determining that the syndrome weight satisfies the threshold, the second type of error control operation configured to identify up to a second quantity of errors.

2. The apparatus of claim 1 , wherein the controller is further configured to cause the apparatus to:

retrieve a third set of data from a second location of the memory system;

determine that the one or more errors are absent from the third set of data based at least in part on performing the first type of error control operation on the third set of data; and

retrieve a fourth set of data from a third location of the memory system based at least in part on determining that the one or more errors are absent from the third set of data.

3. The apparatus of claim 1 , wherein the controller is further configured to cause the apparatus to:

determine that the syndrome weight associated with the first type of error control operation performed on a third set of data retrieved from a second location of the memory system fails to satisfy the threshold;

retrieve a fourth set of data from the second location of the memory system based at least in part on determining that the syndrome weight fails to satisfy the threshold; and

perform the first type of error control operation on the fourth set of data based at least in part on determining that the syndrome weight fails to satisfy the threshold.

4. The apparatus of claim 1 , wherein the controller is further configured to cause the apparatus to:

determine whether the second set of data includes one or more errors based at least in part on performing the second type of error control operation on the second set of data.

5. The apparatus of claim 4 , wherein the controller is further configured to cause the apparatus to:

transmit a notification to a host system that the second set of data includes the one or more errors based at least in part on determining that the second set of data includes the one or more errors.

6. The apparatus of claim 4 , wherein the controller is further configured to cause the apparatus to:

transmit the second set of data to a host system based at least in part on determining that the second set of data fails to include the one or more errors.

7. The apparatus of claim 1 , wherein the controller is further configured to cause the apparatus to:

perform the first type of error control operation on the second set of data based at least in part on retrieving the second set of data; and

determine that the second set of data includes one or more errors based at least on performing the first type of error control operation on the second set of data, wherein performing the second type of error control operation on the second set of data is based at least in part on determining that the second set of data includes the one or more errors.

8. The apparatus of claim 1 , wherein the controller is further configured to cause the apparatus to:

receive, from a host system, the read command that includes an indication of the first location, wherein retrieving the first set of data from the first location of the memory system is based at least in part on receiving the read command.

9. The apparatus of claim 1 , wherein the first type of error control operation comprises a lower latency and a lower error correction capability than the second type of error control operation.

10. A non-transitory computer-readable medium storing code comprising instructions, which when executed by a processor of an electronic device, cause the electronic device to:

retrieve a first set of data from a first location of a memory system based at least in part on a read command;

perform a first type of error control operation on the first set of data over a first duration based at least retrieving the first set of data, the first type of error control operation configured to identify up to a first quantity of errors;

determine whether the first set of data includes one or more errors based at least in part on performing the first type of error control operation;

retrieve a second set of data from the first location of the memory system based at least in part on determining that the first set of data includes the one or more errors;

determine whether a syndrome weight associated with the first type of error control operation satisfies a threshold based at least in part on retrieving the second set of data; and

perform a second type of error control operation on the second set of data over a second duration based at least in part on retrieving the second set of data and determining that the syndrome weight satisfies the threshold, the second type of error control operation configured to identify up to a second quantity of errors.

11. The non-transitory computer-readable medium of claim 10 , wherein the instructions are further executable by the processor to:

retrieve a third set of data from a second location of the memory system;

determine that the one or more errors are absent from the third set of data based at least in part on performing the first type of error control operation on the third set of data; and

retrieve a fourth set of data from a third location of the memory system based at least in part on determining that the one or more errors are absent from the third set of data.

12. The non-transitory computer-readable medium of claim 10 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:

determine that the syndrome weight associated with the first type of error control operation performed on a third set of data retrieved from a second location of the memory system fails to satisfy the threshold;

retrieve a fourth set of data from the second location of the memory system based at least in part on determining that the syndrome weight fails to satisfy the threshold; and

perform the first type of error control operation on the fourth set of data based at least in part on determining that the syndrome weight fails to satisfy the threshold.

13. The non-transitory computer-readable medium of claim 10 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:

determine whether the second set of data includes one or more errors based at least in part on performing the second type of error control operation on the second set of data.

14. The non-transitory computer-readable medium of claim 13 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:

transmit a notification to a host system that the second set of data includes the one or more errors based at least in part on determining that the second set of data includes the one or more errors.

15. The non-transitory computer-readable medium of claim 13 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:

transmit the second set of data to a host system based at least in part on determining that the second set of data fails to include the one or more errors.

16. The non-transitory computer-readable medium of claim 10 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:

perform the first type of error control operation on the second set of data based at least in part on retrieving the second set of data; and

determine that the second set of data includes one or more errors based at least on performing the first type of error control operation on the second set of data, wherein performing the second type of error control operation on the second set of data is based at least in part on determining that the second set of data includes the one or more errors.

17. The non-transitory computer-readable medium of claim 10 , wherein the instructions, when executed by the processor of the electronic device, further cause the electronic device to:

receive, from a host system, the read command that includes an indication of the first location, wherein retrieving the first set of data from the first location of the memory system is based at least in part on receiving the read command.

18. The non-transitory computer-readable medium of claim 10 , wherein the first type of error control operation comprises a lower latency and a lower error correction capability than the second type of error control operation.

19. A method, comprising:

retrieving a first set of data from a first location of a memory system based at least in part on a read command;

performing a first type of error control operation on the first set of data over a first duration based at least retrieving the first set of data, the first type of error control operation configured to identify up to a first quantity of errors;

determining whether the first set of data includes one or more errors based at least in part on performing the first type of error control operation;

retrieving a second set of data from the first location of the memory system based at least in part on determining that the first set of data includes the one or more errors;

determining whether a syndrome weight associated with the first type of error control operation satisfies a threshold based at least in part on retrieving the second set of data; and

performing a second type of error control operation on the second set of data over a second duration based at least in part on retrieving the second set of data and determining that the syndrome weight satisfies the threshold, the second type of error control operation configured to identify up to a second quantity of errors.

20. The method of claim 19 , further comprising:

retrieving a third set of data from a second location of the memory system;

determining that the one or more errors are absent from the third set of data based at least in part on performing the first type of error control operation on the third set of data; and

retrieving a fourth set of data from a third location of the memory system based at least in part on determining that the one or more errors are absent from the third set of data.

21. The method of claim 19 , further comprising:

determining that the syndrome weight associated with the first type of error control operation performed on a third set of data retrieved from a second location of the memory system fails to satisfy the threshold;

retrieving a fourth set of data from the second location of the memory system based at least in part on determining that the syndrome weight fails to satisfy the threshold; and

performing the first type of error control operation on the fourth set of data based at least in part on determining that the syndrome weight fails to satisfy the threshold.

22. The method of claim 19 , further comprising:

determining whether the second set of data includes one or more errors based at least in part on performing the second type of error control operation on the second set of data.

23. The method of claim 22 , further comprising:

transmitting a notification to a host system that the second set of data includes the one or more errors based at least in part on determining that the second set of data includes the one or more errors.

24. The method of claim 22 , further comprising:

transmitting the second set of data to a host system based at least in part on determining that the second set of data fails to include the one or more errors.

25. The method of claim 19 , further comprising:

performing the first type of error control operation on the second set of data based at least in part on retrieving the second set of data; and

determining that the second set of data includes one or more errors based at least on performing the first type of error control operation on the second set of data, wherein performing the second type of error control operation on the second set of data is based at least in part on determining that the second set of data includes the one or more errors.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2022
From: HE, DEPING; CHEN, ZHENGANG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 058831/0687 →
Continuity (2)
Provisional Application 63232982 · Aug 13, 2021
Related Publication 20230052044A1 · Feb 16, 2023