IP Library Granted Patent US 11,843,893
Granted Patent B2
US 11,843,893 · App. 17/588,484 · Granted Dec 12, 2023

Photoelectric conversion device, electronic device, and substrate

Inventor: Hideo Kobayashi (Tokyo, JP)
Assignee: Canon Kabushiki Kaisha
H04N25/772H04N25/616
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Quick Facts
Patent No.
US 11,843,893
App. No.
17/588,484
Granted
Dec 12, 2023
Kind
B2
Abstract

A photoelectric conversion device comprising a pixel portion in which pixels each including a photoelectric converter are arranged, a sample/hold unit configured to sample a signal generated in the photoelectric converter via a vertical signal line and hold the signal, and a converter configured to perform an analog/digital conversion is provided. In the sample/hold unit, a first sample/hold circuit that samples a signal for when the photoelectric converter is reset and a second sample/hold circuit that samples a signal for when a photoelectric conversion operation is performed are connected to one vertical signal line. The pixel portion is arranged on a first substrate, a part of a group configured by the sample/hold unit and the converter is arranged on a second substrate, and another part of the group is arranged on a third substrate.

Claims (43)

1. A photoelectric conversion device comprising:

a pixel portion in which a plurality of pixels, each including a photoelectric conversion element, are arranged in a matrix;

a sample-and-hold unit configured to sample a signal generated in the photoelectric conversion element via a vertical signal line from the pixel portion and hold the signal; and

a conversion unit configured to perform an analog-to-digital conversion on a signal outputted from the sample-and-hold unit,

wherein in the sample-and-hold unit, a first sample-and-hold circuit that samples a signal for when the photoelectric conversion element is reset and a second sample-and-hold circuit that samples a signal for when a photoelectric conversion operation is performed in the photoelectric conversion element are connected to one vertical signal line,

wherein the pixel portion is arranged on a first substrate,

wherein a part of a group, the group being configured by the sample-and-hold unit and the conversion unit, is arranged on a second substrate,

wherein another part of the group is arranged on a third substrate,

wherein in the sample-and-hold unit, a third sample-and-hold circuit is connected to a vertical signal line different from the one vertical signal line, and

wherein a distance between a capacitive element included in the first sample-and-hold circuit and a capacitive element included in the second sample-and-hold circuit is shorter than a distance between the capacitive element included in the first sample-and-hold circuit and a capacitive element included in the third sample-and-hold circuit.

2. The photoelectric conversion device according to claim 1 , wherein the sample-and-hold unit is arranged on the second substrate.

3. The photoelectric conversion device according to claim 2 , wherein a signal outputted from the first sample-and-hold circuit and the second sample-and-hold circuit is transferred to the conversion unit via the same via connecting the second substrate on which the sample-and-hold unit is arranged and the third substrate on which the sample-and-hold unit is not arranged and the conversion unit is arranged.

4. The photoelectric conversion device according to claim 2 , wherein a portion of the conversion unit is arranged on the second substrate on which the sample-and-hold unit is arranged.

5. The photoelectric conversion device according to claim 4 , wherein in the conversion unit, the analog-to-digital conversion circuit is connected to the one vertical signal line, and

wherein a portion of the analog-to-digital conversion circuit is arranged on the second substrate on which the sample-and-hold unit is arranged.

6. The photoelectric conversion device according to claim 1 , wherein the sample-and-hold unit is arranged on the second substrate, and

wherein the conversion unit is arranged on the third substrate.

7. The photoelectric conversion device according to claim 1 , wherein the conversion unit is arranged on the third substrate.

8. The photoelectric conversion device according to claim 7 , wherein a portion of the sample-and-hold unit is arranged on the third substrate on which the conversion unit is arranged.

9. The photoelectric conversion device according to claim 8 , wherein either the first sample-and-hold circuit or the second sample-and-hold circuit is arranged on the second substrate and the other is arranged on the third substrate.

10. The photoelectric conversion device according to claim 1 , wherein a plurality of vertical signal lines are arranged for one pixel column of the pixel portion.

11. The photoelectric conversion device according to claim 1 , wherein the plurality of pixels configure a plurality of pixel units, each including one or more pixels, and

wherein the vertical signal line is arranged corresponding to each of the plurality of pixel units.

12. The photoelectric conversion device according to claim 1 , wherein the conversion unit includes a ΔΣ analog-to-digital conversion circuit.

13. The photoelectric conversion device according to claim 1 , wherein the conversion unit includes a slope analog-to-digital conversion circuit.

14. The photoelectric conversion device according to claim 1 , wherein substrates on which the group is arranged are arranged in a stack.

15. The photoelectric conversion device according to claim 1 , wherein the second substrate is stacked between the first substrate and the third substrate.

16. The photoelectric conversion device according to claim 1 , wherein the conversion unit is a ΔΣ analog-to-digital conversion unit.

17. An electronic device comprising:

the photoelectric conversion device according to claim 1 ; and

a control device configured to control an operation of the photoelectric conversion device.

18. A substrate comprising:

an input unit;

an output unit; and

a sample-and-hold unit,

wherein the substrate is to be stacked with a plurality of substrates,

wherein an analog signal is inputted to the input unit from a substrate of the plurality of substrates,

wherein the sample-and-hold unit is provided with a configuration that holds the analog signal inputted to the input unit via a vertical signal line,

wherein the output unit outputs, to another substrate of the plurality of substrates, an analog signal that the sample-and-hold unit held,

wherein in the sample-and-hold unit, a first sample-and-hold circuit and a second sample-and-hold circuit are connected to one vertical signal line,

wherein in the sample-and-hold unit, a third sample-and-hold circuit is connected to a vertical signal line different from the one vertical signal line, and

wherein a distance between a capacitive element included in the first sample-and-hold circuit and a capacitive element included in the second sample-and-hold circuit is shorter than a distance between the capacitive element included in the first sample-and-hold circuit and a capacitive element included in the third sample-and-hold circuit.

19. The substrate according to claim 18 , wherein the input unit and the output unit are different from each other in a configuration that connects the substrates to each other.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2022
From: KOBAYASHI, HIDEO
To: CANON KABUSHIKI KAISHA
Reel/Frame 059153/0404 →
Priority Claims (1)
JP 2021-016892 · Feb 4, 2021 · national
Continuity (1)
Related Publication 20220247964A1 · Aug 4, 2022
Cited By (3)
US 12,538,050 US 12,666,175 US 12,696,009