Differential amplifier circuit for use in error amplifier or comparator being component of DC to DC converter (as amended)
A differential amplifier circuit of the present invention includes a differential input circuit including first and second transistors, and amplifies a difference voltage between a first input voltage applied to a control terminal of the first transistor and a second input voltage applied to a control terminal of the second transistor. The differential input circuit a P-channel depletion type transistor having a gate connected to the control terminal of the first transistor and a source connected to the control terminal of the second transistor, and the P-channel depletion type transistor operates as a bias current source of the differential amplifier circuit.
1. A differential amplifier circuit comprising a differential input circuit including first and second transistors, the differential amplifier circuit amplifying and outputting a difference voltage between a first input voltage applied to a control terminal of the first transistor and a second input voltage applied to a control terminal of the second transistor,
wherein the differential input circuit includes a P-channel depletion type transistor having a gate connected to the control terminal of the first transistor and a source connected to the control terminal of the second transistor, and
wherein the P-channel deletion type transistor operates as a bias current source of the differential amplifier circuit.
2. The differential amplifier circuit as claimed in claim 1 ,
wherein the first and second transistors are MOS field-effect transistors, respectively, and
wherein the P-channel depletion-type transistor is a P-channel depletion-type MOS field-effect transistor.
3. A power converter apparatus including a differential amplifier circuit,
wherein the differential amplifier circuit comprises a differential input circuit including first and second transistors, the differential amplifier circuit amplifying and outputting a difference voltage between a first input voltage applied to a control terminal of the first transistor and a second input voltage applied to a control terminal of the second transistor,
wherein the differential input circuit includes a P-channel depletion type transistor having a gate connected to the control terminal of the first transistor and a source connected to the control terminal of the second transistor, and
wherein the P-channel deletion type transistor operates as a bias current source of the differential amplifier circuit.
4. The power converter apparatus as claimed in claim 3 ,
wherein the power converter apparatus is a regulator.
5. The power converter apparatus as claimed in claim 3 ,
wherein the power converter apparatus is a DC to DC converter.