Quantum belief propagation for low density parity checks

1. An error correction system, comprising:

a data buffer operable to receive a block of Low Density Parity Check (LDPC) encoded data; and

a processor that reduces a belief propagation algorithm into a quadratic polynomial, the belief propagation algorithm being used to decode the LDPC encoded data, with the processor further mapping the quadratic polynomial onto a plurality of quantum bits (qubits) to embed the quadratic polynomial onto the qubits, and decoding the block of LDPC encoded data via the qubits with the quadratic polynomial to output a block of LDPC decoded data.

2. The error correction system of claim 1 , wherein:

the quadratic polynomial comprises a satisfier function operable to determine parity check solutions that satisfy constraints of an LDPC error correction code.

3. The error correction system of claim 2 , wherein:

the processor is further operable to embed each constraint of the LDPC error correction code onto a single qubit.

4. The error correction system of claim 2 , wherein:

the processor is further operable to embed at least one of the constraints of the LDPC error correction code onto at least a portion of the qubits.

5. The error correction system of claim 2 , wherein:

the quadratic polynomial comprises a distance function operable to determine proximities of the parity check solutions to the block of LDPC encoded data.

6. The error correction system of claim 1 , wherein:

the data buffer is communicatively coupled to a data channel operable to convey the LDPC encoded data to the data buffer; and

the channel comprises at least one of a radio frequency communication link, an optical communication link, an electronic communication link, flash memory cells, or a magnetic storage medium.

7. The error correction system of claim 1 , wherein:

the processor comprises a quantum annealer.

8. A method of error correction, comprising:

receiving a block of Low Density Parity Check (LDPC) encoded data;

reducing a belief propagation algorithm into a quadratic polynomial, the belief propagation algorithm being used to decode the LDPC encoded data;

mapping the quadratic polynomial onto a plurality of quantum bits (qubits) to embed the quadratic polynomial onto the qubits; and

decoding the block of LDPC encoded data via the qubits with the quadratic polynomial to output a block of LDPC decoded data.

9. The method of claim 8 , further comprising:

determining parity check solutions that satisfy constraints of an LDPC error correction code with a satisfier function of the quadratic polynomial.

10. The method of claim 9 , further comprising:

embedding each constraint of the LDPC error correction code onto a single qubit.

11. The method of claim 9 , further comprising:

embedding at least one of the constraints of the LDPC error correction code onto at least a portion of the qubits.

12. The method of claim 9 , further comprising:

determining proximities of the parity check solutions to the block of LDPC encoded data via a distance function of the quadratic polynomial.

13. The method of claim 8 , wherein receiving the LDPC encoded data further comprises:

receiving the LDPC encoded data through a data channel comprising at least one of a radio frequency communication link, an optical communication link, an electronic communication link, flash memory cells, or a magnetic storage medium.

14. The method of claim 8 , wherein:

the qubits are configured with a quantum annealer.

15. A non-transitory computer readable medium comprising instructions that, when executed in a processor comprising a quantum annealer, direct the processor to correct errors in LDPC encoded data, the instructions further directing the processor to:

receive a block of Low Density Parity Check (LDPC) encoded data;

reduce a belief propagation algorithm into a quadratic polynomial, the belief propagation algorithm being used to decode the LDPC encoded data into;

mapping the quadratic polynomial onto a plurality of quantum bits (qubits) to embed the quadratic polynomial onto the qubits; and

decode the block of LDPC encoded data via the qubits with the quadratic polynomial to output a block of LDPC decoded data.

16. The computer readable medium of claim 15 , further comprising instructions that direct the processor to:

determine parity check solutions that satisfy constraints of an LDPC error correction code with a satisfier function of the quadratic polynomial.

17. The computer readable medium of claim 16 , further comprising instructions that direct the processor to:

embed each constraint of the LDPC error correction code onto a single qubit.

18. The computer readable medium of claim 16 , further comprising instructions that direct the processor to:

embed at least one of the constraints of the LDPC error correction code onto at least a portion of the qubits.

19. The computer readable medium of claim 16 , further comprising instructions that direct the processor to:

determine proximities of the parity check solutions to the block of LDPC encoded data via a distance function of the quadratic polynomial.

20. The computer readable medium of claim 15 , wherein the instructions that direct the processor to receive the LDPC encoded data further comprise instructions that direct the processor to:

receive the LDPC encoded data through a data channel comprising at least one of a radio frequency communication link, an optical communication link, an electronic communication link, flash memory cells, or a magnetic storage medium.

21. The computer readable medium of claim 15 , wherein:

the processor comprises a quantum annealer.