IP Library › Granted Patent US 12,210,704
Granted Patent B2
US 12,210,704 · App. 17/611,556 · Granted Jan 28, 2025

Display panel with touch pins and test pins

Inventor: Zuzhao Xu (Hubei, CN)
Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
G06F3/0418G01R31/2891G06F3/0412G06F3/04164G06F3/0446G09G3/20H01L27/1244G09G2300/0413G09G2310/0297
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Quick Facts
Patent No.
US 12,210,704
App. No.
17/611,556
Filed
Feb 2, 2023
Granted
Jan 28, 2025
Kind
B2
Art Unit
2629
USPC
345/174
Abstract

The present invention provides a display panel including a display area and a terminal area adjacent to each other, the terminal area includes a driving chip area bonded with a driving chip, a plurality of touch leads are provided in the driving chip area, first ends of the plurality of touch leads are electrically connected to a plurality of touch electrodes in the display area, and a plurality of test pins is electrically connected to second ends of the plurality of touch leads and used for transmitting a test signal are also located in the driving chip area.

Claims (43)

1. A display panel, wherein the display panel comprises a display area and a terminal area arranged at least on a side of the display area, the terminal area comprises a driving chip area bonded with a driving chip, and a wiring area around the driving chip area,

the display area is provided with:

a plurality of touch leads and a plurality of touch electrodes, wherein first ends of the plurality of touch leads are electrically connected to the plurality of touch electrodes, the plurality of touch leads are arranged in a first direction, and the first direction is parallel to a side of the display area close to the driving chip area,

the driving chip area is provided with:

a plurality of test pins used for transmitting a test signal, and electrically connected to second ends of the plurality of touch leads to transmit the test signal to the plurality of touch electrodes, the plurality of test pins are arranged in the first direction; and

a multiplexing circuit comprising a plurality of multiplexing input terminals and a plurality of multiplexing output terminals, wherein a number of the multiplexing input terminals is less than a number of the multiplexing output terminals; the plurality of multiplexing input terminals and the plurality of test pins are in one-to-one correspondence, the plurality of multiplexing output terminals and the plurality of touch leads are in one-to-one correspondence; each of the plurality of multiplexing input terminals is electrically connected to a corresponding test pin, and each of the plurality of multiplexing output terminals is electrically connected to a corresponding touch lead;

the wiring area is provided with:

a plurality of first control pins used for transmitting a first control signal to control a turned-on state between the plurality of multiplexing input terminals and the plurality of multiplexing output terminals, wherein the plurality of first control pins are arranged in the first direction, and a symmetry axis of the plurality of first control pins in the first direction coincides with a symmetry axis of the plurality of test pins in the first direction; and

a plurality of positioning marks located on sides of the plurality of first control pins away from the plurality of test pins and used for locating the plurality of first control pins and a plurality of probes,

wherein the driving chip area is further provided with a plurality of dummy pins located on a side of the plurality of test pins and a side of the multiplexing circuit which are close to the plurality of first control pins, wherein the plurality of dummy pins are arranged in a second direction perpendicular to the first direction, and each of a plurality of connection lines that are connected to one of a plurality of control terminals and a corresponding first control pin is provided between two adjacent dummy pins to prevent signal interference among the connection lines, and

the wiring area is further provided with a plurality of second control pins for transmitting a second control signal, wherein the plurality of second control pins are in one-to-one correspondence with the plurality of first control pins, and an antistatic circuit is provided between the plurality of first control pins and the plurality of second control pins.

2. The display panel of claim 1 , wherein the multiplexing circuit is positioned between the plurality of test pins and the plurality of touch leads, the plurality of multiplexing input terminals are arranged in the first direction, and the plurality of multiplexing output terminals are arranged in the first direction.

3. The display panel of claim 1 , wherein the

control terminals are electrically connected to the plurality of first control pins to transmit the first control signal to the plurality of control terminals to control a turned-on state between the plurality of multiplexing input terminals and the plurality of multiplexing output terminals.

4. The display panel of claim 3 , wherein

each of the plurality of second control pins is electrically connected to a corresponding first control pin to transmit the second control signal to the plurality of control terminals to electrically disconnect the plurality of multiplexing input terminals and the plurality of multiplexing output terminals.

5. The display panel of claim 1 , wherein the driving chip area is further provided with:

a plurality of touch pin groups, wherein each of the plurality of touch pin groups comprises a plurality of touch pins for transmitting a touch signal, and

wherein the plurality of touch pins and the plurality of touch leads are in one-to-one correspondence, and the plurality of touch pins are electrically connected to second ends of the plurality of touch leads to transmit the touch signal to the plurality of touch electrodes.

6. The display panel of claim 5 , wherein the driving chip area is further provided with:

a plurality of data pin groups, each of the plurality of data pin groups comprises a plurality of data pins for transmitting a data signal;

wherein the plurality of data pin groups and the plurality of touch pin groups are alternately arranged in the first direction, and the plurality of data pin groups and the plurality of touch pin groups are bonded to a same driving chip to perform a transmission of the touch signal and the data signal.

7. A display panel, wherein the display panel comprises a display area and a terminal area at least on a side of the display area, the terminal area comprises a driving chip area bonded with a driving chip, and a wiring area around the driving chip area,

the display area is provided with:

a plurality of touch leads and a plurality of touch electrodes, wherein first ends of the plurality of touch leads are electrically connected to the plurality of touch electrodes, the plurality of touch leads are arranged in a first direction, and the first direction is parallel to a side of the display area close to the driving chip area, and

the driving chip area is provided with:

a plurality of test pins used for transmitting a test signal, and electrically connected to second ends of the plurality of touch leads to transmit the test signal to the plurality of touch electrodes, the plurality of test pins are arranged in the first direction; and

a multiplexing circuit comprising a plurality of multiplexing input terminals and a plurality of multiplexing output terminals, wherein a number of the multiplexing input terminals is less than a number of the multiplexing output terminals; the plurality of multiplexing input terminals and the plurality of test pins are in one-to-one correspondence, the plurality of multiplexing output terminals and the plurality of touch leads are in one-to-one correspondence; each of the plurality of multiplexing input terminals is electrically connected to a corresponding test pin, and each of the plurality of multiplexing output terminals is electrically connected to a corresponding touch lead;

the wiring area is provided with:

a plurality of first control pins used for transmitting a first control signal to control a turned-on state between the plurality of multiplexing input terminals and the plurality of multiplexing output terminals, wherein the plurality of first control pins are arranged in the first direction, and a symmetry axis of the plurality of first control pins in the first direction coincides with a symmetry axis of the plurality of test pins in the first direction,

wherein the driving chip area is further provided with a plurality of dummy pins located on a side of the plurality of test pins and a side of the multiplexing circuit which are close to the plurality of first control pins, wherein the plurality of dummy pins are arranged in a second direction perpendicular to the first direction, and each of a plurality of connection lines that are connected to one of a plurality of control terminals and a corresponding first control pin is provided between two adjacent dummy pins to prevent signal interference among the connection lines,

the wiring area is further provided with a plurality of second control pins for transmitting a second control signal, wherein the plurality of second control pins are in one-to-one correspondence with the plurality of first control pins, and

an antistatic circuit is provided between the plurality of first control pins and the plurality of second control pins.

8. The display panel of claim 7 , wherein the multiplexing circuit is positioned between the plurality of test pins and the plurality of touch leads, the plurality of multiplexing input terminals are arranged in the first direction, and the plurality of multiplexing output terminals are arranged in the first direction.

9. The display panel of claim 7 , wherein the control terminals are electrically connected to the plurality of first control pins to transmit the first control signal to the plurality of control terminals to control a turned on state between the plurality of multiplexing input terminals and the plurality of multiplexing output terminals.

10. The display panel of claim 9 , wherein

each of the plurality of second control pins is electrically connected to a corresponding first control pin to transmit the second control signal to the plurality of control terminals to electrically disconnect the plurality of multiplexing input terminals and the plurality of multiplexing output terminals.

11. The display panel of claim 7 , wherein the driving chip area is further provided with:

a plurality of touch pin groups, wherein each of the plurality of touch pin groups comprises a plurality of touch pins for transmitting a touch signal,

wherein the plurality of touch pins and the plurality of touch leads are in one-to-one correspondence, and the plurality of touch pins are electrically connected to the second ends of the plurality of touch leads to transmit the touch signal to the plurality of touch electrodes.

12. The display panel of claim 11 , wherein the driving chip area is further provided with:

a plurality of data pin groups, wherein each of the data pin groups comprises a plurality of data pins for transmitting a data signal, and

wherein the plurality of data pin groups and the plurality of touch pin groups are alternately arranged in the first direction, and the plurality of data pin groups and the plurality of touch pin groups are bonded to a same driving chip to perform a transmission of the touch signal and the data signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 17, 2021
From: XU, ZUZHAO
To: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Reel/Frame 058145/0381 →
Priority Claims (1)
CN 202110868268.7 · Jul 30, 2021 · national
Continuity (1)
Related Publication 20240045545A1 · Feb 8, 2024
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Cited By (1)
US 12,408,287